A Multicore Embedded Processor For Fingerprint Recognition G. Danese, M. Giachero, F. Leporati, N. Nazzicari Dip. di Informatica e Sistemistica - University of Pavia – via Ferrata 1, Italy Tel. +39 0382 985350 – Fax +39 0382 985373 – e-mail: francesco.leporati@unipv.it Abstract - Biometric identification systems exploit automated methods of recognition based on physiological or behavioural people characteristics. Among these, fingerprints are very affordable biometric identifiers. In order to build embedded systems performing real-time authentication, a fast computational unit for image processing is required. In this paper we propose a parallel architecture that efficiently implements the high computationally demanding core of a matching algorithm based on Band Limited Phase Only spatial Correlation (BLPOC), elaborated by two concurrent computational units implemented onto Stratix II family Altera FPGA. The realised device is competitive with those provided by similar hardware solutions described in literature and outperforms the elaboration capabilities of general purpose PC processors. Keywords: FPGA, Application Specific processors, Biometrics 1. INTRODUCTION A Biometric System is essentially a pattern recognition system that identifies a person by his/her specific physiological and/or behavioural peculiarity (biometric identifier). At present, several biometric technologies have been developed and are employed in a variety of applications. Among them, fingerprints are one of the most commonly used, since they provide a good tradeoff among the properties a recognition system should have. A typical Automatic Fingerprint Identification System (AFIS) requires very small dimensions while at the same time, a significant number of fingerprint template images reuire to be quickly searched and compared. For all these reasons, developing dedicated devices for the implementation of proper recognition algorithms is mandatory to satisfy the previously mentioned requirements. The performance of matching algorithms is highly dependent on the fingerprint representation and on the image quality. Most of these methods are minutiae based and thus highly influenced by fingertip surface conditions. To avoid such problems, the matching algorithm we worked on, proposed by K. Ito et al. in [1, 2], employs the evaluation of correlation between the input and template images, so to achieve robust matching also in case of low-quality fingerprints. In this paper we present an FPGA-based system for fingerprint matching; the algorithm we implemented is based on the computation of the Band Limited Phase Only Correlation (BLPOC) function. Our architecture implements these efficient and robust algorithm on an Altera Stratix II FPGA device including the Nios II processor, outperforming modern general purpose processors in carrying out computation on 2D input images. The use of this elaboration platform makes the system small, portable and fast, improving the performance of the demanding elaboration required by an automatic system for safety applications. This work represent a significant evolution of the paper [25] into which we implemented the Phase Only Correlation function on a single core CPU. 2. STATE OF THE ART Fingerprint authentication and issues related to large database management are well known topics [3]. The development of a fingerprint verification system on a low- cost embedded platform is an open issue, and FPGA technology appears to be a good candidate to achieve high performance/cost ratios [4, 5]. Most research projects focus on minutiae related algorithms, showing that very good error rates can be reached at the cost of high elaboration times, due to both the samples preparation (enrollment) and actual matching phase [6-10]. The enrollment time is a cost to be paid (typically) only once per new fingerprint, because it is possible to store in the database already enrolled data. High enrollment times are due to minutiae extraction, that is a high demanding operation. Furthermore, the matching time must be multiplied for every fingerprint in database, so it must be as small as possible, especially for huge databases. Correlation-based algorithms have been proposed [1, 11- 12]. Efficient correlation implementation is a very well known problem, and it is possible to take advantage of the many good results available in literature [13-14]. To the best of our knowledge, nobody has proposed an efficient correlation-based fingerprint matching architecture yet. 3. THE BLPOC ALGORITHM The algorithm we chose to implement is known as Band Limited Phase-Only Correlation (BLPOC), proposed in [1, 2] and consisting of the following processing steps: 1. the two fingerprints to compare are enhanced (to improve the results of the following steps); 2. one of the fingerprints is rotated by several angles, thus generating a number of fingerprints to compare the other with; 2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools 978-0-7695-4171-6/10 $26.00 © 2010 IEEE DOI 10.1109/DSD.2010.101 779