Analog Integrated Circuits and Signal Processing, 43, 61–69, 2005 c  2005 Springer Science + Business Media, Inc. Manufactured in The Netherlands. Fully Differential CMOS Current Feedback Operational Ampliﬁer SOLIMAN A. MAHMOUD AND INAS A. AWAD Electronics and Communications Engineering Department, Cairo University, Fayoum Branch, Egypt Received October 6, 2003; Revised February 27, 2004; Accepted April 21, 2004 Abstract. This paper presents a new CMOS fully differential current feedback operational ampliﬁer (FDCFOA). The proposed CMOS realization of the FDCFOA is based on a novel class AB fully differential buffer circuit. Besides the proposed FDCFOA circuit is operating at supply voltages of ±1.5 V, it has a total standby current of 400 µA. The applications of the FDCFOA to realize variable gain ampliﬁer, fully differential integrator, and fourth order fully differential maximally ﬂat low pass ﬁlter are given. The fourth order ﬁlter provides 8 dB gain and a bandwidth of 4.3 MHz to accommodate the wideband CDMA standard. The proposed FDCFOA and its applications are simulated using CMOS 0.35 µm technology. Key Words: current feedback opamp, fully differential buffer, current conveyor 1. Introduction In recent years, fully differential circuit conﬁgurations have been widely used in high-frequency analog sig- nal applications like switched capacitor ﬁlters [1] and multi-standard wireless receivers [2]. As compared to their single-ended counterparts, they have higher re- jection capabilities to clock-feed-through, charge in- jection errors and power–supply noises, larger output dynamic range, higher design ﬂexibility, and reduced harmonic distortion. In this paper, a new fully differ- ential CMOS current feedback ampliﬁer (FDCFOA) is proposed. The proposed CMOS realization of the FD- CFOA is based on a novel class AB fully differential buffer circuit. The FDCFOA has the advantages of the single ended CFOA beside the advantages of the fully differential signal processing. The FDCFOA has many useful applications like the single ended CFOA [3–13]. The FDCFOA is basically a fully differential device as shown in Fig. 1. The Y 1 and Y 2 terminals are high impedance terminals while the X 1 and X 2 terminals are low impedance ones. The differential input voltage V Y12 applied across Y 1 and Y 2 terminals is conveyed to a differential voltage V X12 across the X 1 and X 2 ter- minals; i.e., (V X12 = V Y12 ). The input currents applied to the X 1 and X 2 terminals are conveyed to the Z 1 and Z 2 terminals, i.e., (I x1 = I z1 and I x2 = I z2 ). The Z 1 and Z 2 terminals are high impedance output nodes suitable for current outputs. The differential voltage developed across the Z 1 and Z 2 terminals is buffered by a unity gain fully differential voltage buffer to the output ter- minals O 1 and O 2 , i.e., (V O12 = V Z12 ). The block di- agram of the FDCFOA is shown in Fig. 2. The input stage FDB1 is a unity gain fully differential buffer forc- ing V X12 to follow V Y12 . The input currents to the X 1 and X 2 terminals are transferred to the high impedance nodes Z 1 and Z 2 terminals by means of current mirrors. The differential output voltage is obtained by using a second fully differential unity gain buffer FDB2. There- fore, the structure of the FDCFOA is based on using two FDBs and current mirrors. The paper is organized as follows, in Section 2, the realization of the FDCFOA is presented. In Section 3, applications of the FDCFOA in realizing fully differen- tial integrator, fourth order fully differential maximally ﬂat low pass ﬁlter consisting of two cascaded biquad sections are given. PSpice simulations of the proposed FDCFOA and its applications using CMOS 0.35 µm technology are also given. 2. CMOS Realization of the FDCFOA The structure of the proposed FDCFOA is based on the proposed class AB fully differential buffer (FDB) circuit shown in Fig. 3. The proposed FDB is consisting