See discussions, stats, and author profiles for this publication at: https://www.researchgate.net/publication/257293010 Trading-Off Error Detection Efficiency with Implementation Cost for Sequential Circuits Implemented with FPGAs Chapter · January 2012 DOI: 10.1007/978-3-642-27579-1_42 CITATION 1 READS 27 2 authors, including: Grzegorz Borowik Auckland University of Technology 82 PUBLICATIONS 193 CITATIONS SEE PROFILE All content following this page was uploaded by Grzegorz Borowik on 17 December 2016. The user has requested enhancement of the downloaded file. All in-text references underlined in blue are added to the original document and are linked to publications on ResearchGate, letting you access and read them immediately.