Augmenting Real-Time DSP in Implantable High-Density Neuroprosthetic Devices K. Oweiss, Y. Suhail, K. Thomson, J. Li, A. Mason Electrical and Computer Engineering Department, Michigan State University, East Lansing, MI Abstract – Developments in microfabrication of high-density electronic interfaces to the central nervous system rapidly evolved in recent years. Nonetheless, there is a lack of higher digital signal processing capability to cope with the larger data throughput. Multiresolution analysis by means of the wavelet transform has shown to yield substantial processing and compression capabilities of high volumes of neural signals while preserving the necessary information needed to understand the neural coding mechanism. We describe a systems approach for reducing the complexity of on-chip discrete wavelet transform (DWT) computation for multiple data channels. The reduction is achieved by exploiting regularity in the filtering steps of the lifting-based DWT algorithm associated with negligible degradation in signal fidelity with integer fixed point arithmetic representation. The main advantages of the proposed architecture lie in the scalability to an arbitrary number of channels and decomposition levels. The results demonstrate that on-chip computation is feasible prior to data transmission, permitting large savings in bandwidth requirements and communication costs. Keywords – Implantable Neuroprosthetics; wavelet transform; neural signal processing; electrode arrays I. INTRODUCTION Neuroprosthetic devices play a vital role in helping patients with severe motor disorders achieve a better lifestyle by enabling direct interface to the central nervous system at various levels. These devices generally consist of an array of microelectrodes implanted subcutaneously to record electrical signals and selectively stimulate neuronal populations in brain structures of interest. For implantable neuroprosthetic applications, advances in microfabrication technology have greatly accelerated the integration of high-density microelectrode arrays on a single device [1]. A typical state-of-the-art microelectrode array can have as many as 1000 electrodes integrated on a single device [2]. This is considered a modest number considering that approximately 30,000 neurons and 2.4x10 8 synapses (assuming 8,000 synapse/neuron) may exist in a cubic millimeter of cortex tissue [3]. In a typical recording experiment (uplink) with a 96- electrode array sampled at 25kHz per channel, the aggregate rate is 2.4 Msamples/sec. At 12 bits/sample, the bit rate is nearly 29 Mbps. Equally important, a typical stimulation experiment (downlink) using a retinal prosthesis with 100 electrodes would require 10 Mbps to allow a 625-100 pixel image to be effortlessly read by the patient [4]. Existing biotelemetry developments for extracutaneous transmission quickly erode in the face of such data volume [5][6]. It is becoming clear that the onus is on the signal processing community to accommodate quantum advances in neural data processing and compression on chip to cope with these rapid advances in microprobe technology. A viable alternative is to extract the useful information from the raw neural data prior to extracutaneous transmission making use of the sparsity of the neural signals on the time base as illustrated in Figure 1. In such case, more advanced signal processing needs to be performed early in the data stream. Such alternative may reduce the data throughput by approximately 75% in bursting activity and 85-90% in spontaneous neural activity. New methods for processing neural data [7][8] have shown that multiresolution analysis by means of the discrete wavelet transform (DWT) representation of the neural signals due to its high compression capabilities, and its ability to preserve the spike information of the neural signals [9]. Moreover, the development of the lifting scheme for computing the DWT coefficients yielded substantial reduction in hardware requirements [10]. Some recent efforts have been devoted to implement the lifting scheme for single data sequences [11][12]. However, these approaches were focused on optimizing processing speed and are neither suitable for implantable neuroprosthetic applications (with severe limitations on both power and area), nor suitable for “streaming” neural data in real-time because it is assumed that an entire data frame is available in the memory. The work we present herein constitutes a novel approach to design efficient architectures for lifting-based DWT computation for multichannel neural data processing such that an appropriate compromise among power, required bandwidth, computational load, memory, and delay time is achieved within the constraints imposed by implantability requirements. We primarily focus in this paper on recording array microsystems since the applications are much more widespread among the neuroscience and bioengineering communities. II. THEORY A coarse layout of our approach for augmenting the DSP components in a neural interface system front-end is Figure 1: Traces from a typical train of neural spikes from multiple neurons recorded by a single electrode. The top trace contains 4 seconds (at 20kHz sampling rate), while the bottom left contains 400 msec, and the bottom right is 40 msec. The information is contained for the most part in the outliers from the baseline noise (indicated by arrows). 108 Proceedings of the 3 Annual International IEEE EMBS Special Topic Conference on Microtechnologies in Medicine and Biology Kahuku, Oahu, Hawaii ú 12 - 15 May 2005 rd 0-7803-8711-2/05/$20.00©2005 IEEE