Status and future of maskless lithography Daniel Henry a, * , Jan Willem Gemmink b , Laurent Pain c , Sergei V. Postnikov d a STMIcroelectronics, 850 rue Jean Monnet, F-38926 Crolles Cedex, France b PHILIPS Semiconductors, 860 rue Jean Monnet, F-38926 Crolles Cedex, France c CEA-LETI, 17 rue des Martys, F-38054 Grenoble Cedex, France d Freescale Semiconductors, 870 rue Jean Monnet, F-38926 Crolles Cedex, France Available online 23 January 2006 Abstract For the last 25 years, maskless lithography (ML2) has always been perceived as a promising technology because of its superior res- olution and flexibility. However, the very low throughput of ML2 compared to that of optical lithography has prevented it from being used in high volume manufacturing. Consequently, this technology has always been used for niche applications. With ever decreasing critical dimensions (CD), increasing cycle time and escalating mask-set cost, ML2 may become a reliable solution to the following appli- cations: • device engineering driven by resolution requirements, • fast and economical product prototyping driven by the cycle time, • low volume manufacturing driven by the high cost of mask sets. Currently, only single beam tools are used, but worldwide efforts are being carried out in order to develop new tools based on the con- cept of multi beams (10,000–100,000 beamlets). These tools use photons, high energy electrons (100 kev) or low energy electrons (10 kev). Cost of ownership modelling (COO) was carried to determine the conditions when ML2 approach is more economical than all mask based lithography for prototyping or low volume production. It is assumed that ML2 is applicable for patterning the critical layers only. There exists a business operating case at which a decrease in the mask set expense outweighs an increase in the depreciation cost, which would render utilization of ML2 economically beneficial. The conditions of economically justifiable use of ML2 will be examined. Ó 2006 Elsevier B.V. All rights reserved. Keywords: Maskless lithography; Cost of ownership 1. Introduction For the last twenty years, maskless lithography with the use of electron beams has been perceived as a promising technology because of its intrinsic resolution and flexibility. However, the very low through-put (t-put), 3–4 orders of magnitude lower than the t-put of the optical scanners, and supposed difficulties of integration into a standard CMOS process flow have delayed the introduction of such a technology into a pilot line. The advanced patterning group of Crolles 2 Alliance, France has utilized e-beam direct write (EBDW) approach with a 300 mm Leica machine as a complimentary lithogra- phy option to a classical optical lithography for the past 5 years. During this period of time, more than 10,000 wafer layers have been exposed for the purpose of device engi- neering and prototyping applications down to the 32 nm node (100 nm pitch). This number of EBDW exposures has provided a good statistics for assessing the merits of EBDW [1]. In spite of the progress in resist sensitivity (below 10 lC/cm-2), current density (up to 22 A/cm-2), stage speed (up to 50 mm/s), the total writing time is still 2.5 ls per shot at best, including exposure time, settling 0167-9317/$ - see front matter Ó 2006 Elsevier B.V. All rights reserved. doi:10.1016/j.mee.2005.12.016 * Corresponding author. Tel.: +33 04 76 92 62 67. E-mail address: daniel.henry@st.com (D. Henry). www.elsevier.com/locate/mee Microelectronic Engineering 83 (2006) 951–955