Design and evaluation of a multiple-valued arithmetic integrated circuit based on differential logic zyxw T. Hanyu A. Mochizuki M. Kameyama zyxwvutsrqpo Indexing terms: Integrated circuits, Differential logic zyxwvutsrqp Abstract: A zyxwvutsrqp design of a new multiple-valued current-mode circuit for high-speed arithmetic systems is presented. The use of a differential logic circuit with dual-rail complementary inputs makes a signal-voltage swing small with a constant driving current, so that the delay of the circuit can be reduced. As an application to arithmetic systems, it is demonstrated that the operating speed of the radix-2 signed-digit (SD) adder based on multiple-valued current-mode differential logic is 1.3 times faster than that of the corresponding binary CMOS implementation at a 3.5V supply voltage. 1 Introduction Rapid advances in submicron VLSI technologies make it possible to increase the chip density, while both the decreased driving capability of each switching gate due to lower supply voltage and the increasing load capaci- tance due to interconnection complexity limit the processing speed inside the chip [ 11. Multiple-valued current-mode integrated circuits are suitable for reduc- ing the wiring complexity and the number of active devices in arithmetic large-scale-integration chips, because the frequently used linear sum operation can be performed simply by wiring [2, 31. In fact, several arithmetic integrated circuits have been designed and fabricated by the combination of multiple-valued cur- rent-mode logic circuits, resulting in better performance compared with the corresponding binary implementa- tion [4-61. However, the switching delay of a multiple-valued basic component becomes slower than that of a binary one because the minimum driving current of the multi- ple-valued basic component is smaller than that of the binary one. This effect is accelerated more and more at a lower supply voltage because the drain-to-source cur- rent in MOS transistors are reduced as the square of the gate-to-source voltage. To solve the above problem, zyxwvu 0 IEE, 1996 zyxwvutsrqponm IEE Proceedings online no. 19960710 Paper first received 2nd January and in revised form 29th May 1996 The authors are with the Department of Computer and Mathematical Sci- ences, Graduate School of Information Sciences, Tohoku University, Aoba, Aramaki, Aoba-ku, Sendai 980-77, Japan a new multiple-valued basic component with high driv- ing capability must be developed for deep submicron ULSI chips. This paper presents a design of a new multiple-val- ued current-mode logic circuit for high-speed arithme- tic systems. A multiple-valued current-mode circuit based on differential logic is used as a basic component to make the signal-voltage swing small yet driving capability large [7]. The use of the multiple-valued cur- rent-mode differential logic circuit enables high-speed operations with reduced device and interconnection counts [8]. The operating speed of multiple-valued current-mode logic circuits is primarily limited by the delay of thresh- old detectors. The threshold detector, which is one of the most important components in the circuits, can be designed by the differential logic circuit with a pair of complementary current signals. Using such dual-rail complementary inputs, the signal-voltage swing for switching becomes smaller than that of a conventional circuit with a single-rail input. The threshold detector based on differential logic runs faster than the conven- tional threshold detector, because the use of a comple- mentary input pair makes it possible to reduce a voltage swing required for switching. In fact, the switching speed of the proposed thresh- old detector is 1.4 times faster than that of the conven- tional threshold detector under the normalised power dissipation. As a typical application to arithmetic sys- tems, it is demonstrated that the operating speed of the radix-2 signed-digit (SD) adder based on the multiple- valued current-mode differential logic is 1.3 times faster than that of the corresponding binary CMOS imple- mentation at a 3.5V supply voltage. 2 differential logic circuit In multiple-valued current-mode logic circuits, thresh- old detection is one of the most important functions. The total operating speed of any multiple-valued cur- rent-mode logic circuits mainly depends on the delay of the threshold detectors. In the following Section we dis- cuss how to improve the switching speed of the thresh- old detector. Principle of a multiple-valued current-mode zy 2. I detector The function of a threshold detector is to detect an Delay of a conventional threshold 331 IEE Proc.-Circuits Devices Syst., Vol. 143, No. 6, December 1996