2015 International Conference on Circuit, Power and Computing Technologies [ICCPCT] 978-1-4799-7075-9/15/$31.00 ©2015 IEEE Design and Implementation of Low-Oversampling Delta Sigma Modulators for High Frequency Applications Denny Mathew Dept. of Electronics and Communication Engineering College of Engineering Guindy, Anna University Chennai, Tamilnadu, India dennymathew29@gmail.com Karthik TS Dept. of Electronics and Communication Engineering College of Engineering Guindy, Anna University Chennai, Tamilnadu, India writetotsk@gmail.com Abstract— The key factor making Delta-Sigma modulators (DSM) one of the most popular components in modern electronic circuits is its high linearity. This is achieved by using a high oversampling ratio which is unfortunately the limiting factor towards its application in high frequency circuits. The necessity of high processing speed and power, the increased cost and complexity and wastage of available bandwidth are some of the significant demerits of using a high oversampling ratio. This paper suggests that the delta sigma modulators require a high frequency processing and not high oversampling ratio. A parallel structure to perform the high frequency processing along with an adaptive method to improve the signal quality at the output is proposed. The suggested technique allows the simultaneous execution of fast and complex computations required for wireless systems. The analysis is performed using MATLAB simulations and the results claim a reduction in oversampling ratio by a factor of 16 while keeping the same signal to noise ratio. The proposed architecture is implemented on a field-programmable gate array (FPGA) board which is then validated with a code division multiple access signal. The output signal bandwidth is observed to be increasing four times without any increase in the sampling frequency. Keywords—Delta–sigma modulation, oversampling, parallel processing, field-programmable gate array (FPGA). I. INTRODUCTION Delta-Sigma modulators (DSM) are one of the most popular components in modern electronic circuits mainly because of their high linearity while performing data conversion [1]. This is achieved by using a very high oversampling ratio. Generally for a high quality signal output, the sampling frequency should be sufficiently larger than the Nyquist rate of the signal. So, oversampling a signal with a sampling frequency large enough to produce the desired accuracy will give us the required high quality signal. Typically the sampling frequency should be 8 times larger than the Nyquist rate. Using a high oversampling ratio will automatically reduce the quantization noise thereby increasing the signal to noise ratio. For a decent output we usually use an oversampling ratio of 256 in ordinary DSM’s. Unfortunately while performing data conversion using very high oversampling ratio, there are a number of disadvantages which are large enough to restrict its application in high frequency operating circuits. The major one is the need of a high processing speed for the modulator and the processing unit. This follows the increased cost and complexity of the system. The requirement of higher processing power as the frequency is large is also another hurdle to overcome. Again, the use of a higher sampling frequency may cause the system to malfunction. For example, if an ADC is calibrated as it samples a signal of frequency which is a multiple of 50/60 Hz, applying a high oversampling ratio will cancel its property and make the system faulty by increasing the noise in the output. In addition to these, wastage of available bandwidth is also another serious issue associated with high oversampling ratio. When we go for oversampling, we are taking samples on a wide range of the signal thereby leaving less space for the remaining signals transmitting under the given band width. In spite of these demerits in oversampling a signal, the employment of DSM in current high frequency applications is limited. II. LITERATURE REVIEW As an experimental approach large bandwidths for the input signal with reduced oversampling ratios were used by designers around the world to achieve a high linearity. One such approach is by using higher order modulators and keeping a low oversampling ratio, but its application in circuits has been greatly discouraged by the instability issues associated with the higher order modulators. The concept of multi-rate signal processing is yet another approach which has been adopted by researchers to reduce the oversampling ratio. It decomposes the input signal spectrum into several sub-bands using a Hadamard transform [4], [5] and is then applied to different DSMs separately. Later, the outputs of these DSMs are combined together. The need of two DSMs for a single output bit makes it insufficient as the die area is large on implementation using radio frequency integrated circuit technology.