Journal of The Electrochemical Society, 146 (1) 327-330 (1999) 327 S0013-4651(97)12-123-1 CCC: $7.00 © The Electrochemical Society, Inc. SiC is considered a leading semiconductor for the development of high temperature microelectromechanical systems (MEMS), due to its excellent mechanical properties, large bandgap, good carrier mobility, and excellent thermal properties. Outstanding chemical, mechanical, and wear properties make SiC an excellent material for devices to be used in corrosive, high friction, and erosive environments. Moreover, SiC and Si can be processed using the same equipment with no risk of cross contamination, 1 making SiC an exceptional complementary material to silicon for many MEMS applications. In terms of crystal structure, SiC exists in over 200 crystalline modifications called polytypes, with the cubic 3C-, and the hexago- nal 4H-, and 6H- polytypes as the most commonly used in the fabri- cation of microdevices. 6H- and 4H-SiC are considered the best polytypes for high temperature and high power electronics, due to the commercial availability of low defect density single-crystal sub- strates and high-quality epitaxial thin films. Unfortunately, 4H- and 6H-SiC substrates are very expensive and only available in wafer diameters up to 2 in. To be commercially competitive with existing technologies, MEMS requires low-cost batch fabrication on inex- pensive, large-area substrates. 3C-SiC is the only SiC polytype which meets this requirement, since it can be readily grown on 4 in. Si wafers. 2 Atmospheric pressure chemical vapor deposition (APCVD) is probably the most widely used technique to grow heteroepitaxial 3C-SiC films on Si substrates. The substrates are mounted on a SiC- coated graphite susceptor, which is radio frequency (rf) induction heated to temperatures between 1250 and 1360°C. It has been observed that the surface morphology of the epitaxial films is relat- ed to the relative processing age of the susceptor, with older suscep- tors yielding films with an average surface roughness (R a ) as high as 1000 Å. Surface roughness also tends to increase with increasing film thickness. Increasing surface roughness adversely affects pat- tern definition during photolithography by compromising feature resolution. Mechanical polishing techniques using diamond-based slurries are commonly used to reduce the surface roughness of as- deposited SiC films. Diamond-based slurries are very effective at reducing surface roughness to a level suitable for device fabrication; however, they are very expensive, in particular as substrate sizes increase. In addition, while chemical mechanical polishing (CMP) processes for 4H- and 6H-SiC have been developed, 3,4 no informa- tion regarding CMP of 3C-SiC has been reported. This paper pre- sents the development of a SiC-based polishing recipe which can be used to reduce the surface roughness of 3C-SiC films to below 40 Å, a level suitable for the fabrication of MEMS devices. Experimental The samples used in this study were nominally 2 m thick, sin- gle-crystal 3C-SiC films grown on 4 in. Si wafers by APCVD using a process detailed elsewhere. 2 The samples were grown using a sus- ceptor which was nearing the end of its usable lifetime, as deter- mined by optically observing the surface morphology of the as-de- posited films. The films in this study had a uniform dull gray appear- ance when observed optically, which was in stark contrast to the specular appearance of 2 m thick films grown when the susceptor was new. Following film growth, the R a of each sample was measured at five locations across each wafer using a Dektak 3030ST stylus force profilometer with a tip radius of 2.5 m, a scan length of 1 mm, a stylus force of 40 mg, and a scan speed of 50 samples/s. The aver- age surface roughness of the as-deposited samples was measured to be about 380 Å. The polishing experiments were performed using a Struer’s Peda- max-2 polishing system, presented schematically in Fig. 1. Each wafer was polished for 10 min using a Rodel Suba IV polishing pad. The rotation axes of the wafer carrier and polishing pad were spaced 6 cm apart and driven at 150 rpm in a counterclockwise direction. The pol- ishing slurries consisted of SiC powders mixed with deionized (DI) Roughness Reduction of 3C-SiC Surfaces Using SiC-Based Mechanical Polishing Slurries A. Azzam Yasseen, Christian A. Zorman, z and Mehran Mehregany Microfabrication Laboratory, Department of Electrical, Systems, and Computer Engineering and Science, Case Western Reserve University, Cleveland, Ohio 44106, USA In order to develop a low-cost alternative to diamond-based polishing slurries for SiC, mechanical polishing of 3C-SiC films using SiC-based slurries was studied, and an optimized polishing recipe was developed. The relationship among applied force, particle size, and slurry solid contents on the roughness reduction rate of as-deposited 3C-SiC films was investigated. A response surface methodology statistical approach was used to determine the functional relationship between the aforementioned parameters in order to optimize the polishing recipe. The optimized polishing recipe reduces the surface roughness from approximately 400 to 40 Å, while only removing 1000 Å of the film. This recipe has been successfully used as part of a surface treatment process for homoepitaxial growth of low defect density 3C-SiC films on 3C-SiC substrates. © 1999 The Electrochemical Society. S0013-4651(97)12-123-1. All rights reserved. Manuscript submitted December 29, 1997; revised manuscript received August 22, 1998. z E-mail: zorman@mems4.cwru.edu Figure 1. Schematic diagram of the polishing setup. ) unless CC License in place (see abstract). ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see 54.167.105.44 Downloaded on 2017-04-02 to IP