Photoemission studies on heterostructure bipolar transistors Fritz Schuermeyer a, *, Peter J. Zampardi b , Peter M. Asbeck c a Air Force Research Laboratory, AFRL/SNDD, Wright Patterson AFB, Dayton, OH 45433-7322, USA b Rockwell Science Center, 1049 Camino Dos Rios, Thousand Oaks, CA 91360, USA c University of California, San Diego, Department of ECE 0407, 9500 Gilman Dr, La Jolla, CA 92093, USA Abstract We apply in-situ photoemission techniques to characterize the band pro®le in heterostructure bipolar transistors. The measurements are performed on-wafer on fully fabricated InP based HBTs at room temperature. We demonstrate that this technique is sensitive to detect and analyze barriers between emitter and base as well as between base and collector. Furthermore, the photoresponse provides information on the doping characteristics of the active layers. Published by Elsevier Science Ltd. 1. Introduction Heterostructure bipolar transistors (HBTs) are being developed for applications where speed, power, e- ciency, and low noise are of importance. These transis- tors can also be used as fast photodetectors [1]. Especially, III-V compound semiconductor based HBTs are of interest due to their high electron vel- ocities and mobilities. A multitude of III-V compounds exist which can be grown lattice matched or strained to form heterostructures. In these transistors, the base layers are chosen such that their bandgap is smaller than that of the emitter [2] to minimize carrier injec- tion from the base to the emitter, which is a parasitic current. Conduction and valence band discontinuities exist at the heterointerface. The conduction band dis- continuity creates an electron barrier between emitter and base. A similar barrier may exist between base and collector in double heterostructure HBTs (DHBTs). These barriers have negative eects on the device characteristics. The emitter base barrier increases the threshold voltage in n-p-n HBTs and reduces the uniformity. A barrier between base and collector leads to charge storage in the base, limiting the maximum output current. To minimize or elimin- ate the barriers, grading layers are often employed to obtain a smooth transition of the bands. These grading layers have to be very thin to retain low emitter or col- lector resistances. Frequently, one or both of these emitter, base, or collector materials are ternary com- pound semiconductors, and the grading layers need to be quaternary compounds. Furthermore, both the emitter and base layers are relatively heavily doped and the grading layer can only be lightly doped. Hence, diusion of one or both of the dopants into the grading layer will negate its function. The growth of such a non-uniform, thin layer is dicult to accom- plish and more analytical techniques are needed to assure that no barrier exists at the heterojunction. Barriers to electronic carriers play an important role in most semiconductor devices and have been evalu- ated extensively [3]. For example, the Schottky contact to an n-type semiconductor represents such a barrier. Several techniques exist to analyze the height of the barriers, such as the evaluation of the temperature dependence of the current voltage behavior of diodes, capacitance voltage studies, and photoemission Solid-State Electronics 43 (1999) 1555±1560 0038-1101/99/$ - see front matter Published by Elsevier Science Ltd. PII: S0038-1101(99)00103-3 * Corresponding author. Fax: +1-937-255-2306.