Simulations of Variable I-Layer Thickness Effects on Silicon PIN Diode I-V Characteristics Warsuzarina Mat Jubadi 1 , Siti Norafzaniza Mohammad Noor 2 Department of Electronic Engineering, Faculty of Electrical and Electronic Engineering, Universiti Tun Hussein Onn Malaysia (UTHM), Johor, Malaysia 1 suzarina@uthm.edu.my, 2 afzaniza_mohammadnoor@yahoo.com Abstract— PIN Diode gains its name from the idealized intrinsically doped, I-layer, sandwiched between a P-type and N-type layer. The N-layer of PIN diode was doped with Arsenic and the P-layer doped with Boron. The performance of the PIN diode primarily depends on the chips geometry and the nature of the semiconductor material, particularly in the I-layer. This paper presents a simulation of four I-layer thickness (5µm, 20µm, 30µm and 50µm) effects on the silicon PIN diode I-V characteristics carried out by using Sentaurus Technology Computer Aided Design (TCAD). The major goals of the simulation work are to study the I-layer thickness (d) effects on diode I- V characteristics and to implement PIN diode fabrication process flow into a commercially available process environment. The important parameters of PIN diode were analyzed to study the effect of PIN diode I-V characteristics. Keywords—PIN diode; I- layer; thickness; Sentaurus TCAD I. INTRODUCTION A PIN diode is a silicon (Si) semiconductor device formed of a high resistivity intrinsic I-layer which sandwiched between a P-type and N-type layer. Generally, the PIN diode finds widely used in RF, UHF and microwave circuits as it acts as a current controlled resistor at these frequencies. PIN diodes are also used in power electronics as their central layer can withstand high voltages [1]. They are extensively implemented in electronic switching applications as radio frequency switches. The resistance value of the PIN diode is determined only by the forward biased dc current. The resistivity of the I-layer varies according to the quantity of electrons and positive holes, and these changes the high frequency series resistance [2]. Previous researches in [4-7] varies from the PIN diode structure design, PIN geometrics due to I-layer, low frequency model, large signal model and switching speed model. A a result, in this paper the authors concentrate on the geometry of PIN diode using different I-layer and its effects toward the I-V characteristics PIN diode. The 2D stucture of PIN diode is simulated with different thickness (d) of I-layer and I-V characteristics and the doping profiles are analyzed using Sentaurus TCAD tools discussed in the next topic II. PIN DIODE STRUCTURE PIN diode is a silicon semiconductor consisting of a layer of intrinsic (high resistivity) material of finite area and thickness which is contained between a P-type and N-type layer. When the diode is forward biased, charge is injected into the intrinsic or I-layer [3]. This charge consists of holes and electrons which have a finite lifetime before recombination. The PIN diode structure is shown in Fig.1. Figure 1. PINDiode Structure By varying the I-layer width and diode area it’s possible to construct PIN diode of different geometrics to result in the same Shunt Resistance, R S and Total Capacitance, C T characteric. These devices may have similar small signal characteristics. However, the thicker I-region diode would have a higher bulk or RF breakdown voltage and better distortion properties. On the other hand, the thinner device would have faster switching speed. The theory of I-region thickness effects has encouraged the study to be carried out. III. METHODOLOGY A. Design and Simulation Tools In this project, Sentaurus TCAD tool is used to design the PIN diode structure and simulate the I-V characterictics. Sentaurus TCAD is one of among TCAD tools to design the semiconductor models. TCAD itself refers by using computer simulations to develop and optimize semiconductor processing technologies and devices [8]. Fig.2 illustrates the design flow to create a PIN diode by using Synopsis Sentaurus TCAD tools. This work is supported by the Ministry of Higher Education, Malaysia (MOHE) under the Fundamental Research Grant Scheme (FRGS); vote number 0559. 2010 IEEE Symposium on Industrial Electronics and Applications (ISIEA 2010), October 3-5, 2010, Penang, Malaysia 978-1-4244-7647-3/10/$26.00 ©2010 IEEE 428