1 Near Shannon Limit for Turbo Code with Short Frames Chokri CHEMAK, Mohamed Salim BOUHLEL U.R. of Sciences Electronics, Technologies of Images and Telecommunications (SETIT) Higher Institute of Biotechnology of Sfax - Tunisia Chokri.chmak@laposte.net medsalim.bouhlel@enis.rnu.tn Abstract -The increase of performances of turbos codes with short frame is the subject of a lot of research. Several techniques have been elaborated such as the choice of good interleaver or the use of a coder with high coding rate. In this paper, we present a new technique to increase the performances of turbos codes by increasing the constraint length therefore the free distance of the code. We could show that with the increase of constraint length, we could get good results concerning the reduction of the Bit Error Rate (BER). We examine the performances in Bit Error Rate (BER) of turbo codes for coding rates 1/2 and 1/3 with the use of variables constraint lengths. We used a Gaussian Channel and a BPSK modulation for signal transmission. For decoding we use Soft Output Viterbi Algorithm (SOVA). Keywords: Parallel concatenation, constraint length, Rate of Signal to Noise (Eb/N0), Turbo code. 1 Introduction With an important number of frame decoding, Berrou and al. [1], [2] have put in evidence the particular capacity of turbos codes to binary message correction. They have shown that in iterative decoding, parallel concatenated codes or turbos codes can achieve error performances very close to the Shannon limit. The iterative decoding of turbo code can be realized using either the Bahl and al. Maximum A Posteriori (MAP) algorithm [3] or the Soft Output Viterbi Algorithm (SOVA) [4]. Berrou's 16-state code can achieve a Bit Error Rate (BER) of 10 -5 at a Signal to Noise Ratio (SNR) equal to 0.7 dB provided after 18 iterations decoding and a large interleaver of about 65536 bits. The performance of Bit Error rate can be improved for an important number of frames by the choice of the interleaver. However, the error performance of turbo codes depends on the size of the interleaver and The error probability is larger when a smaller interleaver is used [5]. Furthermore, an "error floor" is observed at a probability of error of 10 -5 - 10 -6 depending on the size of the interleaver [5], [6]. Perez et al. [5] have shown that the error floor observed with turbo codes is caused by the relatively low free distance of the code. The error performance can be improved by increasing the interleaver size or the free distance of the code. Increasing the interleaver size leads to longer delays and larger memory requirements, which may not be desirable for some applications. Furthermore, when the frame is short, such as in mobile radio systems where block sizes are typically less than 300 bits, increasing the interleaver size is not possible. Increasing the free distance of the code can be done by using a code with a better interleaver. In this paper we used a new technique proved by the simulations that follow, for the reason to increase performances of turbo coder. We try to increase the free distance of the code by increasing the constraint length that can compensate the short number of frame and the dimension of the interleaver. In this article we will go to present the general structure of the turbos codes, the poncturation of the coding ratio from 1/3 to 1/2 and the results of simulations of turbos codes performances in term of Bit Error Rate (BER) according to the Signal to Noise Ratio (Eb/N0) for different constraint lengths. Finally, the results of simulations will be compared to those of the convolutionnels codes. 2 Presentation of the turbo coder The system transmission of turbo coder or parallel concatenation code is constituted by setting in parallel form of recursive systematic convolutionnel coders (RSC) C1 and C2 [1]. The structural diagram of turbo codes is represented in the Fig. 1. d k is the input bit information. X k is systematic output bit forming codewords. Y1k and Y2K are the parities bits coming respectively from the first and the second recursive coder after interleaving the systematic bits or input bits.