International Journal on Recent and Innovation Trends in Computing and Communication ISSN: 2321-8169 Volume: 5 Issue: 6 1187 – 1190 _______________________________________________________________________________________________ 1187 IJRITCC | June 2017, Available @ http://www.ijritcc.org _______________________________________________________________________________________ VLSI Realization of Switched Hamming Neural Network for 3-Bit Digit Recognition S. Archana, ECE dept. BRECW Hyderabad, India archanasubhash2006@yahoo.co.in Dr. B. K. Madhavi, ECE dept, SWEC, Gandipet Hyderabad, India bkmadhavi2009@gmail.com Dr. I V Murlikrishna JNT University, Hyderabad , India iyyanki@gmail.com Abstract—Thispaper aims at analyzing neural network method in pattern recognition. HSPICE level 49 simulation of switched current mode hamming neural network is able to recognize any threebit digit provided its template is stored using current mirror. It determines highest input current signal and output it based on time division basisusing Winner Take All circuit (WTA) based on time division basis. The DC simulation shows power dissipation of 1.8517mW and rise time delay of 3.2318E-09 s Keywords- VLSI, HSPICE, CM, WTA, SCHNN, AR, RR __________________________________________________*****_________________________________________________ I. INTRODUCTION A neural network is a processing device, whose design was inspired by the design and functioning of human brain and their components. The proposed solutions focus on applying Hamming Network and MAXNET model for pattern recognition [1].The efficient hardware integration of neural network based paradigms is a key element in speeding up the implementation of real-time applications while taking full benefit of their inherent parallel operation mode. The focus of the work described in the following is the development and integration into an integrated circuit of a specific NN model which is shown to allow several pattern recognition applications [2]. The proposed Hamming artificial neural network (ANN) performs Hamming distance calculation between a previously stored set of patterns, and the current input, based on two layer architecture [3]. The thrust of recent research has changed. CMOS is widely used for hardware implementation using various signaling scheme such as voltage , current, frequency, semi digital ,pulse modulated or fully digital[9,10] It is a two layer network. First layer consists of matching rate computation circuit for modules while second layer consists of matching rate comparison circuit[7]. Second layer also have other subcircuits such as switched current type order ranking circuit, pulse generating circuit,identification rejection judgement[4,5].  Matching rate computation circuit: This layers compares between to be identified pattern and template pattern. This is called matching rate computation.  Matching rate comparison circuit Once the computation is done ,second layer is used to provide ranking the order of matching rate.  Switched current typr order ranking circuit: It accepts switched current input signals. It determines highest input current signal and output it based on time division basis.  Identification rejection judgement circuit: It performs both absolute and relative judgement.Absolute judgement is  Pulse generating circuit: It generates various clock pulses for sequential operation of network. Figure 1 Block diagram for switched current mode hamming neural network This second layer determines the most close pattern with respect to to be identified input pattern.It has winner take all circuit internally for determining the best match between input pattern and stored templates.The previous version of VLSI implemtation of pattern recogniiton circuits using hamming neural network could output only the most close match.Such circuits had less reliability. Present systems are much complex in terms of number of standard patterns stored as well as being multistage system requires more reliability[10]. This made it necessary to determine more than one output as standard pattern which are most close to the to –be- identified input pattern.This concept is implemented in switched current mode hamming neural network which improves the reliabilty of system. Outputing the most close standard pattern first and