International Journal of Engineering and Techniques - Volume 4 Issue 2, Mar-Apr 2018 ISSN: 2395-1303 http://www.ijetjournal.org Page 1024 An Inventive Design of Multiplier Using 8*8 Bit Reversible NS Gate Penumallu Srinivasareddy 1 , Jaganmohan Panigrahi 2 1(Dept of ECE, Kakinada Institute of Technology and Science, Divili, A.P, India Email: penumallu12@gmail.com) 2(Dept of ECE, Kakinada Institute of Technology and Science, Divili, A.P, India Email: jaganmohanpanigrahikits@gmail.com) I.INTRODUCTION Power and speed is an important term in low power VLSI circuit design. The classical digital approach has been worn the digital logic gates, which are irreversible in behavior. Recently, Reversible logic has great attentiveness due to their ability to reduce the power dissipation. Power dissipation is the major necessity in low power VLSI design. It has several applications in DNA computing, quantum computation,nanotechnology, low power CMOS and Optical information processing. Irreversible hardware computation outcome in energy dissipation due to loss in information. A circuit is said to be reversible if the input vector can be uniquely get back from the output vector and there is a one-to-one similarity between its input and output assignments, i.e. not only the outputs can be uniquely determined from the inputs, but also the inputs can be get back from the outputs. Energy dissipation can be decreased or even eliminated if computation becomes Information- lossless. Energy loss is a very main factor in modern VLSI design. Irreversible hardware computation outcome in energy dissipation due to information loss. J R.Landauer has shown that for irreversible logic computations, every bit of information lost produced KTln2 joules of heat energy, where K is Boltzmann’s constant and T is the temperature at which computation performed. Reversible logic circuit doesn’t have loss of information and reversible computation in a system can be executed only when the system exist of reversible gates. Reversible logic is more crucial for the construction of low power, low loss computational designs which are crucial for the design process of arithmetic circuits utilized in quantum computation, Nanotechnology and other low power digital circuits. In Proposed system, there consists a design of multiplier and adder units by number of reversible RESEARCH ARTICLE OPEN ACCESS Abstract: Almost all digital system hardware, multiplier is one of the most important part. so a high speed, reduced area,reduced delay and low power consumption multiplier design will results in effective digital system design. The conventional gates AND,OR,EXOR are not reversible. Here the 8*8 reversible gate designs called NSG. The purpose of NS Gate is to implement in all logical Boolean operations.Reversible gates that carry out reversible logic synthesis are Feynman gate, Toffoli gate, fredkin gate, peres gate etc., and some other reversible gates. By using the reversible NS gate we make a multiplier that gives very efficient output. Keywords- Reversible Logic circuit; Reversible Logic Gate; Constant Input; Garbage Output; Low-Power VLSI etc.