SF 2 HDL: A Computational Tool of State Transition Diagram Translation Tiago da Silva Almeida 1 , Alexandre César Rodrigues da Silva 2 and Silvano Renato Rossi 3 1. Dept. of Electrical Engineering, UNESP - Univ. Estadual Paulista,Ilha Solteira, 15385-000, Brazil 2. Dept. of Electrical Engineering, UNESP - Univ. Estadual Paulista,Ilha Solteira, 15385-000, Brazil 3. Universidad Nacional del Centro de La Pcia. De Buenos Aires Olivarria, Argentina. Received: ** **, 2011 / Accepted: ** **, 2011 / Published: January 25, 2011. Abstract: The lack of standard to electronic circuits modeling made possible the development of many tools and modeling languages for electronic circuits. In this way, it is necessary several tools to be used on different descriptions stage of the designs. This paper presents a tool called SF2HDL (Stateflow to Hardware Description Language or State Transition Table) that translates a finite state machine on state transition diagram representation, described by Stateflow tool, into an input file standard for TABELA program or into a file behavioral VHDL directly. The TABELA program was used to optimization this finite state machine. After that, it was used the TAB2VHDL program to generated the VHDL code on register transfer level, what permits comparisons with results obtained of synthesis. The finite state machine must be described by Mealy model and the user can describe the machine on high level abstraction using all Simulink support. The tool was very efficient on computational cost and it made translation of several cases, for the two VHDL description models. Every state machine translated was simulated and implemented on device EP2C20F484C7, using Quartus II environment. Keywords: Finite state machine, VHDL, Synthesis, HDB3, Computational tool. 1. Introduction The search for reduction of cost and time in manufacturing of IC (Integrated Circuit) led to important technology advances that gave rise ASIC (Application Specific Integrated Circuit) more Tiago da Silva Almeida, Master in Electrical Engineering, research fields: computational methods of synthesis of circuits in high level abstraction. E-mail: tiagoalmeida@computer.org. Alexandre César Rodrigues da Silva, PhD. in Electrical Engineering, research fields: computational methods of synthesis of circuits in high level abstraction and and standardized measurement based in IEEE std. 1451. E-mail: acrsilva@dee.feis.unesp.br. Silvano Renato Rossi, PhD. in Electrical Engineering, research fields: computational methods of synthesis of circuits in high level abstraction and automatic process of measurement and standardized measurement based in IEEE std. 1451. E-mail: srossi@fio.unicen.edu.ar. Corresponding author: Tiago da Silva Almeida, Master in Electrical Engineering, research fields: computational methods of synthesis of circuits in high level abstraction. E-mail: tiagoalmeida@computer.org. complex and developed for several application, for example, the automotive industry, aerospace, telecommunications, etc. However, the task of develop new technologies is not a trivial activity and demand great effort from designer and of the tools involved in the project, making it necessary the emergence of computational tools that can solve incompatibility in the specifications of design. The size and complexity of systems such as VLSI (Very Large Scale Integration) and ULSI (Ultra Large Scale Integration), increase the need to eliminate manual and repetitive operations, motivating the development of automated systems projects. To realize the automation of design process is agreement that the understandings of the problems and processes project are crucial. The integrated circuits technology has allowing that more components are inserted into single silicon chip