3066 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 61, NO. 11, NOVEMBER 2014
Current Feedback Linearization Applied to
Oscillator Based ADCs
Matthias Voelker, Sara Pashmineh, Student Member, IEEE, Johann Hauer, Member, IEEE, and
Maurits Ortmanns, Senior Member, IEEE
Abstract—A regulation scheme to linearize the tuning curve of
CMOS ring oscillators is proposed in this paper. The scheme uses
the current consumption of the CMOS ring elements, which is pro-
portional to the output frequency to the first order. The design of
the feedback loop is presented on system level in conjunction with
performance enhancements made on the implementation level. A
weakly non-linear ring oscillator model is developed to simplify
the control loop design. Model based linearity simulations proof
a good agreement with measurements, while the simulation time
is significantly reduced. A proof of concept implementation of the
proposed linearization technique using CMOS ring oscillators is
presented. Operating at 50 MHz sampling frequency, a maximum
SFDR of 83.8 dB in a narrow band configuration verifies the effec-
tiveness of the linearization. Implemented in a 180 nm process, the
active area of the circuit is only 0.03 , which enables the use
of this technique for multi-channel, multi-parameter measurement
applications.
Index Terms—Analog to digital converter (ADC), linearization
technique, noise shaping, oscillator based ADC, oversampling, ring
oscillator, time-domain signal processing, voltage-controlled oscil-
lator (VCO).
I. INTRODUCTION
G
REAT improvements in semiconductor technologies en-
abled the ongoing integration of measurement circuits.
Fully integrated measurement systems establish the possibility
to develop multi-channel systems.
Many signal processing strategies, which were originally
developed for analog circuits, are transferred into the digital
domain to increase the flexibility and to enable the use of
complex signal processing. Nowadays, analog to digital con-
verters (ADC) are present in nearly every measurement system.
Moving the ADC towards the sensor and minimizing the
required analog signal processing often lead to cost reduction
and performance increase. Application specific ADCs enable
the combination of sensor front-end and ADC [1], [2], and
the ability to develop optimized multi-parameter measurement
systems.
Manuscript received November 27, 2013; revised February 22, 2014 and
April 09, 2014; accepted April 22, 2014. Date of publication July 10, 2014;
date of current version October 24, 2014. This paper was recommended by As-
sociate Editor J. M. de la Rosa.
M. Voelker and J. Hauer are with the Department of Integrated Circuits and
Systems, Fraunhofer Institute of Integrated Circuits IIS, Erlangen, Germany
(e-mail: matthias.voelker@iis.fraunhofer.de; johann.hauer@iis.fraunhofer.de).
S. Pashmineh is with the Technical University Cottbus, Germany (e-mail:
pashmine@tu-cottbus.de).
M. Ortmanns is with the University of Ulm, Germany (e-mail: maurits.
ortmanns@uni-ulm.de).
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TCSI.2014.2327302
Positron emission tomography (PET) is one example of this
type of measurement system as two different parameters, en-
ergy and time of arrival, of individual gamma quanta must be
acquired. The different requirements force the implementation
of parallel analog signal processing chains [3]. Analog to dig-
ital conversion at an early stage can be applied to implement the
two different signal processing strategies, for energy and time
acquisition, within the digital domain [4], [5]. On one hand, the
required ADC has to provide at least 10 effective number of bits
(ENOB) at 1 MS/s for energy acquisition of the gamma quanta.
On the other hand, 50 MS/s and 5 ENOBs are required to re-
alize a timing resolution of 1 ns rms. Additionally, small size and
low power consumption are important because more than 100
of such readout channels will be combined for a single readout
ASIC [6] and hundreds of readout ASICs are used in the system.
The use of typical Nyquist ADC architectures, like succes-
sive approximation or pipeline for the combined requirements,
lead to an over designed ADC for each individual measurement
task. The application of delta-sigma oversampling ADCs could
combine the low data rate, high resolution and high data rate,
low resolution requirements. Unfortunately, a multi-bit imple-
mentation with more than 5 bits of the internal quantizer limits
the optimization of such an ADC for low power and area. Noise
shaping oscillator (OSC) based ADCs provide the same transfer
function as a first order delta-sigma modulator, while achieving
more than 5 bits without oversampling [7].
But linearity of this type of ADC is limited by the tuning
curve of the oscillator. Advanced digital correction techniques
are published to overcome this limitation [8]. At the same time,
modern sub-100 nm CMOS technologies, as typically used for
OSC based ADCs, cannot be applied, since high volume pro-
duction is not anticipated for such PET systems, challenging the
designer to achieve small size in a rather mature technology.
Consequently, this paper presents a linearization scheme
based on the current consumption to frequency relation of
the oscillator, which enables an area effective implementation
of OSC based ADCs for multi-channel systems. The paper
starts in Section II with a short introduction on oscillator based
ADCs. The proposed regulation scheme is presented in Sec-
tion III together with an analysis of its limitations and possible
improvements. A proof of concept implementation in a 180
nm CMOS technology is presented in Section IV to verify the
presented approach. Section V summarizes the measurement
results. Finally, Sections VI and VII discuss the results and give
a conclusion.
II. VCO BASED ADC
ADCs based on current or voltage controlled oscillators at-
tracted increasing attention in recent years [9], [10] because this
type of converter moves most of the conversion process into the
digital domain, which is very attractive in scaled CMOS tech-
nologies. Additional properties like inherent anti-alias filtering,
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