International Journal of Research and Review Vol.7; Issue: 9; September 2020 Website: www.ijrrjournal.com Research Paper E-ISSN: 2349-9788; P-ISSN: 2454-2237 International Journal of Research and Review (ijrrjournal.com) 367 Vol.7; Issue: 9; September 2020 Design and Implementation of Optimized Reversible 4-Bit Linear Feedback Shift Registers for Computing Applications Chandrasekhar Rao Jetti 1 , Hari Chandana Earla 2 , Harish Kumar Goli 3 1 Associate Professor, Bapatla Engineering College, Bapatla, A.P., India 2,3 Scholars, Bapatla Engineering College, Bapatla, A.P., India Corresponding Author: Chandrasekhar Rao Jetti ABSTRACT Reversible logic has emerged as a major area of research in recent years due to its ability to reduce power dissipation which is the main requirement in the low-power VLSI. Reversible Computing has shown greater impact to have enormous applications in emerging technologies such as Quantum Computing, QCA, Nanotechnology and Low Power VLSI. In this paper, we have realized Optimized Reversible Linear Feedback Shift Registers (LFSR) and have explored it in terms of delay, quantum cost, garbage outputs. We have shown a new reversible realization of Serial Input Serial Output (SISO) and Serial Input Parallel Output (SIPO) registers up to N-bit for the design of LFSR. Proposed circuits have been simulated using Vivado 2016.4 and synthesized by using FPGA Nexys-4 DDR. Keywords: Reversible Logic, SISO-Serial Input Serial Output, SIPO-Serial Input Parallel Output, Quantum Computing, Reversible LFSR- Linear Feedback Shift Register. 1. INTRODUCTION The major limitation of technology is power dissipation, which plays a crucial role in digital design in terms of data loss. Hence, reduction of power dissipation remains as an important goal in the VLSI circuit design for many years. Conventionally, digital circuits have been implemented using the basic gates which were irreversible in nature. By using these irreversible logic gates, the circuit life gets reduced as those gates will dissipate more amount of heat. [1] Thus, for every bit of information conventional combinational logic circuits dissipates heat. In 1961, R. Landauer proved that logic computation generates kTln2 joules of heat energy for every bit of information loss where k is Boltzmann’s constant and T is the absolute temperature of the environment. [2] In order to avoid the data loss, the circuit should build with reversible gates instead of irreversible logic gates, which was stated by C. Bennett in 1973. [3] Reversible logic does not lose information. Bennett showed that it is possible to have zero dissipation if network is built with reversible gates only. [4] Reversible logic has also found its applications in several technologies; [5-13] such as optical computing, [5] ultra-low power CMOS design, [6] and nanotechnology. [7] Thus, research on reversible logic essential for the development of future technologies. As there is no possibility of feedback in case of, implementing reversible logic using combinational circuits T. Toffoli in 1980 has shown that feedback is allowed in reversible computing. [8] According to his theory, a sequential circuit is reversible if its combinational part is reversible. Most of the recent works focus on optimizing the reversible sequential design in terms of garbage outputs, delay, number of reversible logic gates, quantum cost. Among all the sequential circuits, shift registers are the most prominently used functional devices in