International Research Journal of Engineering and Technology (IRJET) e-ISSN: 2395-0056
Volume: 07 Issue: 08 | Aug 2020 www.irjet.net p-ISSN: 2395-0072
© 2020, IRJET | Impact Factor value: 7.529 | ISO 9001:2008 Certified Journal | Page 3478
HIGH-SPEED LOW-POWER WIRELESS FREQUENCY TO VOLTAGE
CONVERTER USING CMOS CONVERTER
Prabhakar Babu
1
, Gyanendra Kumar Verma
2
, Ajeet Kumar
3
1,3
PG scholar, Department of Electronics and Communication Engineering, Axis Institute of Technology and
management Kanpur
2
Assistant Professor, Department of Electronics and Communication Engineering,
3
Naraina Vidyapeeth Engineering
and Management Institute Panki, Kanpur
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Abstract - For this work, a high-speed low-power (LHF)
wireless converter (FVC) based on two models was
developed and implemented. The Multisim program is used
to construct the first version. This consists of two RMS-DC
converters, a differentiator and a splitter. The proposed
converter includes a specific output and a linear transition
function without ripples. The second version is designed with
the help of the Tanner EDA system. The differentiator
consists of two voltages for the new transformer, two RMS-
DC converters and a separator. The proposed converter
provides a stable output and linear propagation mechanism
without ripples and is suitable for high-frequency
applications. The downside of the second edition of the first
edition is that it can be extended to the GHz frequency range
as it is optimized with existing CMOS circuits..
Key words: - Frequency to Voltage Converter (FVC), CMOS,
RMS-DC, MOSFET, analogue to digital converters (ADCs),
digital to analogue converters (DACs), variable gain
amplifiers (VGAs).
1.1 Introduction
In this segment, we have introduced and implemented
Frequency to Voltage Converter (FVC) using current CMOS
circuits. The simulation of the planned circuit was
conducted using the Tanner EDA 180 nm technology with
a different supply voltage. Both circuits were tested with
the same input condition for a good synthesis of
comparative analysis. Within this portion, we have also
measured the power consumption of all circuits at various
power supply voltages [3, 5].
1.2 Basic principle of proposed FVC using CMOS circuit
We consider that a sinusoidal signal with amplitude and
frequency
is applied as input in the FVC circuit.
Assuming that the input signal is a pure sinusoidal signal
with a peak amplitude of and input frequency of
() (
) (1)
Then, the derivative of this signal at the output of
differentiator can be written as
()
()
(
) (2)
Where
is the time constant of the differentiator.
After applying
() and
() into the RMS-DC
converters, we get
√
(3)
√
(4)
Thus dividing
in (4) by
in (3), we get
(5)
Where,
is the sensitivity of the converter
And,
is the scaling factor (gain) of the divider
It is clearly seen from equation (5) that the output signal is
linearly proportional to the input frequency,
, and
insensitive to the input signal amplitude, .
1.3 Block diagram of proposed system (Model-II)
Fig.1.1: Block diagram of proposed frequency to voltage
converter
The figure shown above is a basic block diagram of the
proposed circuit. This is a clear example of how we have
applied our circuit and the different parts of it. This