IEEE SIGNAL PROCESSING MAGAZINE [224] NOVEMBER 2009 [ in the SPOTLIGHT ] 1053-5888/09/$26.00©2009IEEE Digital Object Identifier 10.1109/MSP.2009.934182 Multicore DSP Programming Models recent article in Information Week online [1] discussed the positive prospects for wide deployment of the next generation of mobile communication systems. These systems, embodied first in the form of WiMAX technology and later in the form of LTE (long-term evolution) technology prom- ise a notable increase in communication speed and quality. With the increase in performance comes also an increase in the processing needs for the devices enabling these technologies. At the base station side, the deployment of the next generation of mobile systems is in many ways possible in a cost effective form thanks to the use of multicore digital sig- nal processors (DSPs), such as the one shown in Figure 1. When developing a multicore system for a particular application, the system engineer must choose how the software is going to be designed and implemented. The methodology used to develop the software and the software support (librar- ies, runtime abstraction, operating sys- tem) on the multicore together make up the programming model used to develop the application. A well-chosen program- ming model can make a dramatic differ- ence in development effort, ease of debug, and system performance. This article discusses some of the technology challenges and solution approaches involved with finding the right program- ming model for the development of a multicore embedded DSP system. MULTICORE GOALS IN AN EMBEDDED SYSTEM The embedded processor space, includ- ing high-performance DSP processing, faces different challenges from the gen- eral purpose processing space. We would like to leverage multicore programming advances in the embedded space, where computational performance is para- mount, even though the embedded space metrics are: power 1) real-time performance 2) cost 3) here stated in order of importance in today’s technology. We examine these in turn below. First we should state that the goal of a parallel programming model is to provide an environment that enables the extraction and use of the parallel- ism inherit in a program to fully exploit multicore processing capability. This generally means the latency when run on a single core is significantly reduced by the multicore platform, ideally by N times if there are N cores. Clearly, unless the programmer can get multiple actions occurring in par- allel, they will not be able to take advantage of the multicore. A badly designed programming model will not enable the programmer to expose the parallelism in the algorithms being implemented. Debugging, which is significantly harder in multiprocessor systems, may become practically impossible with a badly designed pro- gramming model. A good program- ming model will keep the overhead of Alan Gatherer and Eric Biscondi A L2 RAM DSP DSP DSP Switch Fabric Coprocessor and Peripherals [FIG1] TCI6488 3 core DSP die plot. (continued on page 220)