CMOS/Magnetic Hybrid Architectures Guillaume PRENAT, Mourad EL BARAJI Wei GUO, Ricardo SOUSA Liliana BUDA-PREJBEANU and Bernard DIENY SPINTEC Laboratory, CEA/CNRS GRENOBLE, France Email: guillaume.prenat@cea.fr Virgile JAVERLIAC and Jean-Pierre NOZIERES CROCUS Technology GRENOBLE, France Weisheng ZHAO and Eric BELHAIRE Institut d’Electronique Fondamentale Universit´ e de Paris-Sud, France Abstract— The general purpose of spin-electronics is to take advantage of the spin of the electrons in addition to their electrical charge to conceive innovative electronic components. These components combine magnetic materials which are used as spin-polarizer or analyzer together with semiconductors or insulators. SPINTEC Laboratory works on the development of these components and their integration in innova- tive hybrid CMOS/magnetic architectures. We study in particular the use of Magnetic Tunnel Junctions (MTJ) for the design of Magnetic Random Access Memories (MRAM), Magnetic FPGA (MFPGA) and non-reprogrammable logical devices (transceivers, adders, decoders). The design of these hybrid architectures requires to develop electrical equivalent models of the magnetic elementary components (magnetic tunnel junctions, spin-valves, Hall crosses) compatible with SPICE-like simulators. Complete simulations of the hybrid devices are performed before experimental realization and testing. I. I NTRODUCTION The recent development of spintronics allowed the emergence of a new kind of non-volatile memory called MRAM for Magnetic Random Access Memory . It potentially combines the advantages of all the existing memories : non-volatility, speed, density, low-power consumption, hardness to radiations and endurance. The target of MRAM is to become in the long term a universal memory, replacing the flash memory (non-volatile but power consumming, slow to write and subject to aging), SRAM and DRAM. Many integrated circuits manufacturers are interested in this new technology (IBM, Freescale, Hitachi...) and startups specialised in MRAM are appearing (CROCUS-Technology, Grandis...). Today, many research organisms are investigating the use of magnetic components for other logic families (reprogrammable logic or ASIC’s). The development of MFPGA (Magnetic Field Pro- grammable Gate Array) is a natural continuation of MRAM, since the FPGA, most advanced programmable circuit today, is constituted of elementary cells, programmable by an Operating Code stored in memory. In collaboration with the IEF Laboratory [1], SPINTEC has studied a MRAM-based FPGA, benefiting from non-volatility and thus avoiding to use an external memory. The potential of MTJs is also evaluated to conceive innovative specific circuits (ASIC), without using the memory effect. The paper is structured as follows : in the first part, we will introduce the basic element used in magnetic logic, the MTJ. The second part will be devoted to the development of an electrical model of this component. In the last part, we will present hybrid CMOS/magnetic architectures designed using these models. II. MAGNETIC TUNNEL J UNCTIONS A. Principle A MTJ is a nano structure composed of two FerroMagnetic (FM) layers separated by an insulating layer. The magnetization of one layer (called hard layer) is pinned and acts as a reference layer (figure 1(a)). The magnetization of the other layer (called soft layer) is free and can be switched between two stable directions, parallel or antiparallel to the reference layer. Transitions between parallel and anti-parallel states present an hysteretic behavior. Depending on the relative orientation of the magnetizations, the stack resistance varies: the resistance at the antiparallel state (RAP ) is bigger than the resistance at the parallel state (RP ). The Tunnel Magneto Resistance is defined as the relative resistance variation between these two states: TMR = R AP -R P R P . The digital information is coded by the resistance of the stack. Reading information consists in measuring resistance. This can be carried out, for example, by polarising the junction to a given voltage and reading the resulting current (figure 1(b)). Writing a MTJ cell can be performed by different methods, corresponding to different MRAM generations. (a) MTJ description (b) Reading a MTJ Fig. 1. The Magnetic Tunnel Junction B. FIMS (Field Induced Magnetic Switching) MRAM In the first generation of MTJ, writing is carried out by means of a magnetic field generated by current lines close to the junction (figure 2). If the current densities are strong enough, the magnetic field generated will switch the magnetization of the soft layer. This first generation presents two limits: the MTJ stability is ensured by its Aspect-Ratio. Since the switching current increases when the MTJ size is reduced, it can become excessive for a size below 0.1µm. A large integration can also lead to selectivity problems, since the magnetic field applied to a junction can influence the neighbor cells. Fig. 2. Writing a FIMS junction 1-4244-1378-8/07/$25.00 ©2007 IEEE. 190 Authorized licensed use limited to: CEA Saclay. Downloaded on November 7, 2008 at 07:57 from IEEE Xplore. Restrictions apply.