TuA2.4 zyxwvutsrqp 1 1 zyxwvutsrqponmlkjihgfed :I 5am-l1:30am Low-power short-distance optical interconnect using imaging fibre bundles and CMOS detectors zyxw C. Rooman(102), M. Kuijkc'), D. Filkin~'~), B. Dutta"), R. Windisch"), R. Vounckx"), P. Heremans") University of Brussels V.U.B., department ETRO, Pleinlaan 2, B1050 Brussels, Belgium (*) IMEC, Kapeldreef 75, B3001 Leuven, Belgium, tel++32-16-281751, fax ++32-16-281501, email: rooman@imec.be zyx (3) Schott Fiber Optics, 122 Charlton Street, Southbridge, MA 01550-1960 Introduction and Description of the link We report on the measured link performance of a novel parallel optical link that is to operate from CMOS chip to CMOS chip. The componentsof the optical link are shown in Figure 1 and briefly described below. The optical channel is a IO-cm long imaging fibre bundle with 1.9 mm cross-section and open area ratio of 67%. The bundle is assembled from 7 pm fibres with numerical aperture of 1. The light sources are a 2-dimensional array of 10 X 10 high-speed high-performance light-emitting diodes, called non-resonant cavity LEDs [l]. The LEDs have a diameter of 30 pm and are on a pitch of 100 pm in X and Y. The LED array is designed to be flip-chip mounted onto CMOS driver circuits, and the emission wavelength is 850 nm. To solve the problem that the GaAs substrate is not transparent at this wavelength, the original GaAs substrate is replaced by a fiber optic face plate [2], with square fibres of 5.4 pm with numerical aperture of 1. -._ --.. dense source orr se detectorlreceiver CMOS Figure 1: Components of the proposed low-power short distance optical interconnect Finally, the detectors and receivers in the system are standard CMOS detector- receiver cells, again arranged as an array on a pitch of 100 pm in X and Y. The detectors, called "Spatially Modulated Light Detector" [3] are designed to allow high-speed operation. Each detector is 50 p X 50 p, and its corresponding integrated receiver takes the remaining area in the 100 pn X 100 p cell. The detectorheceiver CMOS circuit was designed in 0.6 pm CMOS, and fabbed in a foundry. Apart from the fibre optic face plate that serves as substrate for the LED array and the imaging fibre bundle, there is no optics in the system. In particular, there is no magnificatioddemagnification at the transition between the source array and the imaging fibre bundle, and no coupling optics at the entrance or exit of the imaging fibre bundle. The fibre is butt-coupled to the opto- electronic devices. The large numerical aperture of the face plate and the fibre bundle allows to capture and guide the light of the LEDs efficiently. Measured link performance Figure 2 shows the open eye diagram of an LED of the array (on fibre optic face plate) transmitted through the imaging fibre bundle at 1 Gbit/s. The measurement was done using a pseudo-random bit stream of 2 23 - 1 bits. It shows that the switching speed of the (small) LEDs used in this work allows Gbit/s optical transmission. Figure 3 shows the digital eye diagram of the optical link including the LED on face plate, the imaging fibre bundle and the CMOS detectorheceiver, at 300 Mbit/s. We checked that the detector, designed in 0.6 p CMOS, operates at bit rates up to 600 Mbit/s. Thk transmission speed of the system is, today, limited by the receiver to 300 Mbitk. Simulations show that a re-design in 0.25 pm should crank up this speed to over 1 Gbitk per channel. 0-7803-6252-7/00/$10.0002000 IEEE 49