Eur. Phys. J. AP 2, 111-115 (1998) T HE EUROPEAN P HYSICAL JOURNAL APPLIED PHYSICS c  EDP Sciences 1998 Dislocations in 6H-SiC and their influence on electrical properties of n-type crystals ? V. Tillay 1 , F. Pailloux 1 , M.F. Denanot 1 , P. Pirouz 2 , J. Rabier 1 , J.L. Demenet 1 , and J.F. Barbot 1, a 1 Laboratoire de M´ etallurgie Physique b , Universit´ e de Poitiers, Bd3-T´ el´ eport 2, 86960 Futuroscope Cedex, France 2 Department of Materials Science and Engineering, Case Western Reserve University, Cleveland, OH 44106, USA Received: 28 October 1997 / Accepted: 20 February 1998 Abstract. By scratching the (0001)Si surface of 6H-SiC followed by annealing, dislocations were introduced in the crystal that were subsequently characterized by Transmission Electron Microscopy (TEM). Schottky diodes were then manufactured from the dislocated crystal and their electrical properties were studied by capacitance-voltage (C-V ), current-voltage (I -V ), and thermally-stimulated capacitance (TSCap) measurements. It was found that the deformation introduces deep traps mainly located in the upper third of the bandgap promoting a significant increase in the series resistance of the diodes. The as-introduced dislocations were predominantly 30 ◦ partials and their core nature was determined to be Si(g) by the technique of Large Angle Convergent Beam Electron Diffraction (LACBED). The compensation effects observed after deformation are presumed to be caused not only by Si(g) dislocations but also by the other defects generated during the deformation step. PACS. 61.72.Ff Direct observation of dislocations and other defects – 71.55.-i Impurity and defect levels 1 Introduction Due to its superior properties of high breakdown elec- tric field, high thermal conductivity, and high electron drift mobility, SiC is considered to be an important wide bandgap semiconductor for high-temperature and high- power electronics. Applications of SiC to electronic de- vices have been recently reviewed in reference [1]. It is well established that defects, and in particular, disloca- tions, can affect the performance of devices made from crystalline semiconductors. However, despite the essential role of dislocations, and the increasing importance of SiC in the high-power electronic industry, few investigations on the effects of dislocations on the electrical properties of this material have been carried out. The purpose of this work was to introduce fresh dislocations in as-received high-quality SiC and compare the electrical properties of the dislocated crystal with the as-received material. In this way, it is expected to gain information on the influence of dislocations on the electrical properties of SiC. The dis- locations were introduced by a scratching technique and they were characterized by conventional TEM as well as by LACBED. Subsequently Schottky diodes were manu- factured from the as-received as well as from the dislo- cated crystals, and their electrical properties were com- ? This paper was presented at D.E.S. 97 (Poitiers, France, September 4 and 5, 1997) a e-mail: Jean-Francois.Barbot@lmp.univ-poitiers.fr b UMR 6630 CNRS pared by performing capacitance and current measure- ments on them. 2 Experimental The present experiments were performed on n-type SiC single crystal wafers commercially produced by Cree Re- search, Inc. using the technique of modified sublimation growth. 1 mm thick samples were cut from these wafers and dislocations were introduced in them by scratching their (0001) Si face by a diamond scriber along a h11 ¯ 20i direction. Two scratches, 400 μm apart, were made at room temperature with an applied load of 90 g. The de- formed samples were then annealed for 3 h at 1000 ◦ C under vacuum (∼ 5 × 10 -5 torr). For electrical measure- ments, contacts were made by metallic pulverisation in UHV (∼ 10 -8 torr range base pressure). Different met- als were used as contacts on the Si and C faces of the crystals. Satisfactory diodes with leakage currents lower than 5 × 10 -4 A under a reverse bias voltage of 5 V were obtained by pulverising Ti/Al (50 nm/80 nm) over a large area on the C-face to serve as an ohmic contact, and through a mask to form the Schottky stripe between the two scratches on the Si-face. Before metallization, the samples were cleaned in boiled aqua regia for five minutes, etched for 10 min- utes in 10% HF and then immersed into boiling water (18 MΩ) for 5 minutes. Capacitance measurements were