IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 51,NO. 1, JANUARY 2004 51 A Back-Wafer Contacted Silicon-On-Glass Integrated Bipolar Process—Part II: A Novel Analysis of Thermal Breakdown Nebojˇ sa Nenadovic ´ , Student Member, IEEE, Vincenzo d’Alessandro, Lis K. Nanver, Member, IEEE, Fabrizio Tamigi, Niccolò Rinaldi, Member, IEEE, and Jan W. Slotboom, Member, IEEE Abstract—Analytical expressions for the electrothermal pa- rameters governing thermal instability in bipolar transistors, i.e., thermal resistance , critical temperature and critical current , are established and verified by measurements on silicon-on-glass bipolar NPNs. A minimum junction temperature increase above ambient due to selfheating that can cause thermal breakdown is identified and verified to be as low as 10–20 . The influence of internal and external series resistances and the thermal resistance explicitly included in the expressions for and becomes clear. The use of the derived expressions for determining the safe operating area of a device and for extracting the thermal resistance is demonstrated. Index Terms—Bipolar transistors, radio frequency (RF) tech- nologies, silicon-on-glass, thermal breakdown, thermal manage- ment, thermal resistance. I. INTRODUCTION I N PART I of this paper, a novel back-wafer contacted sil- icon-on-glass integrated bipolar technology for radio fre- quency (RF) applications was presented [1]. Considerable re- duction of device size and parasitics was achieved by using sub- strate transfer to glass, trench isolation and low-ohmic collector contacting via the back-wafer. The use of isolating materials (mainly glass, oxide, and nitride) not only yields a perfect RF isolation but also provides an almost perfect thermal isolation. The heat generated within the device itself can only spread very slowly into the substrate and is largely confined to the silicon lattice of the active device. This results in an extremely large equivalent thermal resistance of the silicon-on-glass NPNs and a strong electrothermal feedback during device operation. Even in small, single-emitter devices operating at relatively low power levels thermal instabilities are readily observed. In bulk-silicon processes, on the other hand, thermal instability is seen only in large high power devices. Observations of such phenomena date back even to the late ’50s [2]–[4]. Several efforts have been Manuscript received April 21, 2003. The review of this paper was arranged by Editor T. Skotnicki. N. Nenadovic ´ and L. K. Nanver are with Laboratory of ECTM, DIMES, Delft University of Technology, Feldmannweg 17, 2600 GB Delft, The Netherlands (e-mail: nanver@dimes.tudelft.nl). V. d’Alessandro, F. Tamigi, and N. Rinaldi are with Department of Elec- tronics and Telecommunications Engineering, University of Naples “Federico II,” 80125 Naples, Italy. J. W. Slotboom is with Laboratory of ECTM, DIMES, Delft University of Technology, Feldmannweg 17, 2600 GB Delft, The Netherlands. He is also with Philips Research Laboratories, 5656 AA Eindhoven, The Netherlands. Digital Object Identifier 10.1109/TED.2003.820654 devoted towards determining the conditions that lead to thermal instability. Some detailed theories at carrier level have been pro- posed [5]–[7], in which the authors focus on evaluation of the local hot-spot temperature that triggers thermal breakdown in single-emitter devices. Such mechanisms are usually related to operation regimes under very high currents and voltages. Con- ditions were sought for which a perturbation of the current dis- tribution at one place leads to a localized increase in the power density and temperature, which can cause thermal breakdown. A different, circuit-level approach has been pursued by yet other authors, who concentrate on the derivation of the biasing con- ditions and associated temperature that lead to thermal break- down in multicellular devices. These approaches can be clas- sified as either analytical [8]–[10], semi-analytical [11], [12] or numerical [13]. The present silicon-on-glass transistors are the first silicon-based devices, in which the absence of efficient heat sinks enables the experimental study of thermal breakdown at such low current levels that neither high-current/voltage ef- fects nor series resistances dominate the device behavior. In such single-emitter, low-power transistors a perfect thermal isolation is combined with a limited device size and it is safe to assume that the junction temperature is constant along the device. Under these conditions it has been possible to get a clear view of the selfheating and thermal breakdown mechanism, whereby very simple device models could be formulated and verified experi- mentally. First, a temperature-independent formulation for the base– emitter voltage temperature coefficient is established. This en- abled the definition of a new compact analytical model for the rise in junction temperature, called the critical temperature rise , necessary for thermal breakdown. It is proven here that for bipolar transistors with very high thermal resistance and small series resistances, such as RF devices, the critical temper- ature rise above ambient is a weak function of both the device biasing conditions and thermal resistance, and can be as low as 10–20 . Similar results have been achieved by previous au- thors [11], [14]–[16]. The formulation of the critical tempera- ture presented here is, however, complete, explicit and analyt- ical, and also verified experimentally. Among the other things the role of internal and external series resistances for the elec- trothermal response of the transistor becomes clear from this new model. The applicability of this formulation for the extrac- tion of thermal resistance is demonstrated by the experiments described in Part I. Moreover, the formulation of leads to a novel equation for determining the critical current 0018-9383/04$20.00 © 2004 IEEE