FIVE-LEVEL HYBRID CONVERTER BASED ON A HALF-BRIDGE/ANPC CELL R. N. A. L. Silva 1 , L. H. S. C. Barreto 2 , D. S Oliveira Jr. 3 , G. A. L. Henn 4 , P. P. Praça 5 , M. L. Heldwein 6 and S.A. Mussa 7 , Universidade Federal do Ceará 1,2,3,4,5 Grupo de Processamento de Energia e Controle (GPEC) Departamento de Engenharia Elétrica. Caixa Postal 6001 60544-760, Fortaleza, CE, Brasil E-mail: ranoyca@dee.ufc.br 1 , lbarreto@dee.ufc.br 2 Universidade Federal de Santa Catarina 6,7 Electrical Engineering Department, Power Electronics Institute, P.O. Box 5119, 88040-970, Florianópolis, SC, Brazil E-mail: heldwein@inep.ufsc.br 6 Abstract – This work presents a novel five-level hybrid Half-Bridge/ANPC multilevel inverter. Along with the switching states possibilities, employed modulation techniques, conduction losses analysis, and simulation results from a three-phase topology, it is presented the experimental results from a monophasic structure, operating with 1020Hz switching frequency, output frequency of 60Hz, phase output voltage of 220Vrms, output power of 2.3kW and power factor of 0.92. From the presented results, it can be noticed the reduced losses and better harmonic content. Keywords - Multilevel inverter, THD, losses reduction. I. INTRODUCTION Among the last years, several multilevel inverter topologies and different modulation strategies have been developed and used due to the capability of reducing output voltage harmonics, and semiconductors voltage stress, especially in medium and high power applications, as reactive power compensators and AC motor drives. The main advantages inherent to the multilevel converters are: improved energy quality, reducing the filter components requirements, higher efficiency, especially on lower output power and medium voltage range applications, and lower harmonics distortion. Some hybrid topologies presenting five levels at the output phase voltage were introduced in [5-7], presenting costs, volume, and control complexity reduction when compared with other topologies. An important feature that should be noticed in these topologies is the presence of devices with different blocking voltage ratings and switching at different frequencies. This paper presents a novel three-phase hybrid multilevel inverter topology. To validate the inverter structure, two different modulation techniques were used, and the results presented confirm the converter efficiency. II. FIVE-LEVEL HYBRID CONVERTER BASED ON A HALF-BRIDGE/ANPC CELL The proposed topology is shown in Fig. 1, where some restrictions on the switches driving process can be noticed: switches Sx5 and Sx6 present low frequency operation and cannot be turned-on and turned-off simultaneously; Sx2 and Sx3 (as Sx1 and Sx4) cannot be turned-off simultaneously; at last, Sx4 and Sx8 cannot be turned-on simultaneously (as Sx1 and Sx7), where x = a,b,c. Thus, applying an appropriate modulation, it is possible to obtain five levels on output phase voltage, as presented on Table 1. It can be noticed that there are eight possibilities to obtain the level 0, four to obtain the +Vdc, four to obtain -Vdc, and nine possibilities to obtain Vdc/2, as more nine to obtain -Vdc/2. Fig 2 presents the space vector diagram with 125 switching states, where 61 are redundant states, and 96 triangles on the αβ-plane. III. MODULATION TECHNIQUE In order to validate the multilevel inverter topology proposed, two modulation techniques were applied. The first one is based on a phase disposition PWM (PD-PWM) scheme that was presented in [1] and which basis is observed on Fig. 3(a). The second technique is based on a Centered Space Vector PWM (CSV-PWM) scheme based on [2], as presented on Fig. 3(b). The switching logical states used for both are described as follows, and observed on Fig. 3(d). Fig. 1. Three-phase proposed topology. 898 978-1-4577-1646-1/11/$26.00 ©2011 IEEE