Binary Reachability Analysis of Discrete Pushdown Timed Automata Zhe Dang ⋆ , Oscar H. Ibarra ⋆⋆ , Tevfik Bultan ⋆⋆⋆ , Richard A. Kemmerer ⋆ , and Jianwen Su ⋆⋆ Department of Computer Science University of California Santa Barbara, CA 93106 Abstract. We introduce discrete pushdown timed automata that are timed automata with integer-valued clocks augmented with a pushdown stack. A configuration of a discrete pushdown timed automaton includes a control state, finitely many clock values and a stack word. Using a pure automata-theoretic approach, we show that the binary reachability (i.e., the set of all pairs of configurations (α, β), encoded as strings, such that α can reach β through 0 or more transitions) can be accepted by a nondeterministic pushdown machine augmented with reversal-bounded counters (NPCM). Since discrete timed automata with integer-valued clocks can be treated as discrete pushdown timed automata without the pushdown stack, we can show that the binary reachability of a discrete ti- med automaton can be accepted by a nondeterministic reversal-bounded multicounter machine. Thus, the binary reachability is Presburger. By using the known fact that the emptiness problem is decidable for reversal- bounded NPCMs, the results can be used to verify a number of properties that can not be expressed by timed temporal logics for discrete timed automata and CTL * for pushdown systems. 1 Introduction After the introduction of efficient automated verification techniques such as sym- bolic model-checking [16], finite state machines have been widely used for mode- ling reactive systems. Due to the limited expressiveness, however, they are not suitable for specifying most infinite state systems. Thus, searching for models to represent more general transition systems and analyzing the decidability of their verification problems such as reachability or model-checking is an important re- search issue. In this direction, several models have been investigated such as pushdown automata[4,12,17], timed automata[2] (and real-time logics[3,1,14]), and various approximations on multicounter machines[9,7]. ⋆ This work is supported in part by the Defense Advanced Research Projects Agency (DARPA) and Rome Laboratory, Air Force Materiel Command, USAF, under agre- ement number F30602-97-1-0207. ⋆⋆ This work is supported in part by NSF grant IRI-9700370. ⋆⋆⋆ This work is supported in part by NSF grant CCR-9970976. E.A. Emerson and A.P. Sistla (Eds.): CAV 2000, LNCS 1855, pp. 69–84, 2000. c  Springer-Verlag Berlin Heidelberg 2000