Investigation of Single-Cell Dynamic Faults in Deep-Submiron Memory Technologies Said Hamdioui Zaid Al-Ars Georgi Gaydadjiev John D. Reyes Delft University of Technology Laboratory of Computer Engineering Mekelweg 4, 2628 CD Delft, The Netherlands Intel Corporation 2200 Mission College Boulevard Santa Clara, CA 95052, USA E-mail: S.Hamdioui@ewi.tudelft.nl Abstract: This paper presents single-cell dynamic fault models for deep-submicron semiconductor memories together with their associated tests (test primitives). The test primitives are evaluated industrially, together with the traditional tests, using 65nm technology 131 Kbytes embedded SRAMs. The test results are reported, and their analysis shows the increasing importance of dynamic faults and tests, and the exceptional effectiveness of using back-to-back operations (with complementary data values) along bit lines during memory testing. Key words: static faults, dynamic faults, fault primitives, fault models, memory tests, fault coverage. 1 Introduction The continued decrease of feature sizes in deep- submicron technology is the source of new defects and faults that strongly depend on stresses and operation se- quences for their detection; issues like process variation causing threshold voltage deviation, the increasing influ- ence of parasitics, cross talk, propagation delays, the in- crease in power supply noise and the reduction in the noise margin are just some examples. In this paper one of the im- portant fault classes for deep-submicron memory technol- ogy will be addresses. Such class is called dynamic faults [2, 5, 9]. Dynamic faults require the application of more than one operation sequentially in order to be sensitized. For exam- ple, a write 1 operation followed immediately by a read op- eration causes the cell to flip to 0; however, if only a single write or a single read, or a read which does not immedi- ately follow the write is performed, the cell will not flip. The industrial march tests have been mainly designed for static faults, and therefore may not be able to detect dy- namic faults. Little has been published on dynamic faults. In [2] the existence of dynamic faults has been shown for embedded Dynamic Random Access Memories (DRAMs) based on defect injection and SPICE simulation. In [5, 9], the existence of dynamic faults for static RAMs has been proven. This paper deals with dynamic faults. It uses a system- atic way to model them, and shows the existence of other dynamic faults that have not been addressed in [2, 5, 9]. In addition, it introduces a complete set of dynamic fault mod- els based on ‘two operations’ involving a single cell. The paper shows the shortcomings in the fault coverage of the traditional tests, and thereafter introduces new test primi- tives for the targeted dynamic faults. The introduced tests will be industrially evaluated together with traditional tests, and the test results will be reported. This paper is organized as follows. Section 2 introduces the concept of fault primitives that will be used to classify memory faults and define the dynamic fault space in Sec- tion 3. Section 4 discusses the validation of dynamic faults for both static and dynamic RAMs. Section 5 describes the shortcoming in the fault coverage of traditional tests with respect to dynamic faults. Section 6 establishes new test primitives targeting the introduced dynamic faults. Section 7 gives the industrial evaluation and discusses the results. Section 8 ends with the conclusions. 2 Fault primitive concept and classification In order to accurately describe the faulty behavior of memories, the concept of Fault Primitive (FP) [16] has been introduced. It gives a compact mathematical notation describing a single faulty behavior and is represented as . describes the sensitizing operation sequence that sensitizes the fault (e.g., a read ‘0’ operation from a cell containing 0 (i.e., )), describes the value or the behavior of the faulty cell (e.g., the cell flips from 0 to 1), while describes the logic output level of a read operation (e.g., a wrong value 1) in case is a read operation applied 1