International Journal of Power Electronics and Drive System (IJPEDS) Vol. 8, No. 4, December 2017, pp. 1595~1602 ISSN: 2088-8694, DOI: 10.11591/ijpeds.v8i4.pp1595-1602  1595 Journal homepage: http://iaesjournal.com/online/index.php/IJPEDS A comparative Analysis of Symmetrical and Asymmetrical Cascaded M ultilevel Inverter Having Reduced Number of Switches and DC Sources Lipika Nanda, A Dasgupta, U. K. Rout School of Electrical Engineering, KIIT University, India Article Info ABSTRACT Article history: Received Sep 20, 2017 Revised Nov 25, 2017 Accepted Dec 2, 2017 As multilevel inverters are gaining increasing importance .New topologies are being proposed in order to achieve large number of levels in ou tput voltage. A simplified MLI topology has been presented with both symmetrical and asymmetrical configurations. This paper represents a comprehensive analysis of above mentioned topology with FFT analysis,switching and conduction losses of the inverter.Hence efficiency at different carrier frequencies has been calculated successfully.Results are verified with simulation studies.Multilevel inverters are currently considered as a better industrial solution for high dynamic performance and power- quality demanding applications, covering a wide power range. Keyword: Asymmetric MLI conduction loss Swiching loss Symmetric MLI Total harmonic distortion Voltage stress Copyright © 2017 Institute of Advanced Engineering and Science. All rights reserved. Corresponding Author: Lipika Nanda, Department of Electrical Engineering, KIIT University, Bhubaneswar, Odisha, India. Email: lnandafel@kiit.ac.in 1. INTRODUCTION The two level inverters however have many limitaions in operating at high frequency mainly due to constraints of device ratings and switching losses. The multilevel inverters have got tremendous interest in the power indusry.Increasing the number of voltage levels in the inverter without requiring higher ratings on indivisual devices can increase the power rating [1]. Without the use of transformers the unique structure of MLI allows them to reach high voltages with low harmonics or series connected snchronised switching devices.MLIs are divided into three categories, they are neutral point clamped , flying capacitor and cascaded H-bridge [2]. For high voltage applications Cascaded H-bridge multilevel inverter has been researched and preferable [3]-[4]. As the number of level increases, the number of H-bridges also increases [5]. TO avoid the large number of Dc sources, cascaded MLIs are again designed for reduced number of Dc sources and switches [6]. They are catagorised as symmetrical and asymmetrical Cascaded MLIs [7] depending upon the voltage source used. A different topology of MLI designed from several bidirectional switches is proposed in [8]. .Due to bidirectional switches voltage stress across the switches is higher.As the number of switches are less compared to conventional topologies each switch undergoes high voltage stress and switching loss thus increased [9]. 2. RESEARCH METHOD 2.1. Proposed Topology It has two voltage sources V 1 and V 2 along with two capacitors C 1 and C 2 which act like voltage divider circuit. If V 1 =V 2 it is treated as symmetrical otherwise asymmetrical. Proposed Topology produces 7/9/11 levels with certain voltage combinations.