On the Guidance of Reversible Logic Synthesis by Dynamic Variable Reordering David Y. Feinstein Mitchell A. Thornton Innoventions, Inc. Dept. of Computer Science and Engineering 10425 Bissonnet Street Southern Methodist University Houston, TX, USA Dallas, TX, USA david@innoventions.com mitch@engr.smu.edu Abstract This paper proposes a framework that improves reversible logic synthesis by employing a dynamically determined variable order for quantum multiple-valued decision diagrams (QMDD). We demonstrate our approach through augmentation of the Miller-Maslov- Dueck (MMD) algorithm that processes the complete function specification in lexicographical order with our technique. We represent and minimize the complete specification with the QMDD and then synthesize the function specification based on the minimized variable order. The framework produces significantly smaller reversible circuits in many cases. Experimental results also show the effectiveness of using the QMDD size as a measure of the complexity of MVL and binary reversible circuits. 1. INTRODUCTION The extensive research interest in reversible logic synthesis is motivated by its potential for quantum computing applications and low power circuit design. Quantum computing has been actively pursued for the past few decades due to its potential to achieve exponential speed up for some intractable problems such as prime factoring [1] and searching [2]. Quantum devices are necessarily logically and physically reversible logic where there is no fan-out, fan-in, or any feedback. Pioneering work by Landauer, Bennett, Fredkin, and Toffoli investigated the potential of reversible logic to create circuits that theoretically eliminate power dissipation [3,4,5,6]. The process of synthesizing reversible circuits with some desired functionality results in a serial cascade of a variety of basic reversible gates. The synthesis objective is to minimize the number of required gates while also keeping garbage outputs and ancillary inputs to a minimum [7]. Synthesis of reversible circuits is significantly more difficult than conventional logic synthesis as evidenced by the fact that current synthesizers are limited to circuits with less than 20 inputs. Furthermore, optimal synthesis has been achieved only for much smaller circuits with very few inputs [8]. Synthesis is even more difficult for multiple-valued logic (MVL) reversible circuits [9]. Numerous synthesis paradigms have been proposed, including search-based [10,11], template matching [12,13], formal methods using SAT [14], group theory and symmetry based techniques [15], spectral methods [16], and non-search-based lexicographical approaches [17,18]. Reversible logic synthesizers often use a combination of these techniques. The well known MMD synthesizer combines a fast non-search-based lexicographic algorithm with a search- based template matching post processing phase [17]. While the lexicographic synthesis algorithm is relatively fast and guarantees that a circuit will be synthesized, it often produces an excessively non-optimal circuit implementation. This paper proposes the framework we refer to as “QMDDsyn” that improves the lexicographic synthesis algorithm by adjusting the lexicographic order based on the best variable order obtained by the recently introduced quantum multiple-valued decision diagrams (QMDD) [19]. Several researchers have used other decision diagram techniques to determine the cost function during a search- based synthesis approach [9,10,20]. To the best of our knowledge, this research is the first to investigate the relation between the function specification variable order in a decision diagram and the circuit synthesis process. This paper is organized as follows. In Section 2 we briefly discuss reversible logic, lexicographical reversible logic synthesis, and the QMDD structure. We describe our approach in Section 3 and present the experimental results in Section 4. Conclusions and suggestions for further research appear in Section 5. 2. PRELIMINARIES 2.1. Reversible Logic Definition 1: A binary or MVL gate/circuit is logically reversible if it maps each input pattern to a unique output pattern. This mapping is defined by the transformation matrix of the circuit. □ For binary reversible logic, the transformation matrix is of the form of a permutation matrix. For quantum circuits, the transformation matrix is a unitary matrix with complex-valued elements. An n×n reversible circuit with n inputs and n outputs requires a r n ×r n transformation matrix, where r is the radix. The method we present in this paper is applicable to both binary reversible logic circuits (r=2) and MVL circuits (r>2) since both the QMDD data structure and the MMD synthesis approach support MVL reversible logic circuits [9,21].