253 Effect of Processing Conditions on Inversion Layer Mobility and Interface State Density in 4H-SiC MOSFETs Journal of ELECTRONIC MATERIALS, Vol. 30, No. 3, 2001 (Received August 8, 2000; accepted January 16, 2001) Special Issue Paper 253 INTRODUCTION The physical properties of silicon carbide, such as large bandgap (3–3.2 eV), high avalanche breakdown field (2.5–3 MV/cm) and high thermal conductivity (4–5 W/cm-K) make SiC an attractive candidate for high voltage, high temperature and high power de- vice applications. 1,2 One of the most significant advan- tages of SiC is the ability to grow a stable thermal oxide, enabling fabrication of MOS-based device struc- tures. While high-voltage power MOSFETs 3–6 have already been demonstrated in SiC, further develop- ment is challenged by poor inversion layer mobility, especially in the 4H polytype. The full potential of SiC is not yet utilized because the performance of the SiC MOS-based devices is limited by the resistance of the MOS channel and not by the high-resistivity blocking layer. 4H-SiC is favored over 6H-SiC because of the higher and more isotropic bulk mobility, which trans- lates to lower on-resistance in power devices; however for identical processing conditions, channel mobilities are significantly lower in 4H-SiC than 6H-SiC. 7–9 Typical inversion layer mobility in 4H-SiC n-channel MOSFETs, reported from various groups 7–9 vary from ~0.5 cm 2 /V-s to ~20 cm 2 /V-s, depending on the p-type layer (epitaxial or implanted), implant activation conditions, oxidation process and post-metallization high-temperature treatments. There have also been re- Effect of Processing Conditions on Inversion Layer Mobility and Interface State Density in 4H-SiC MOSFETs S. BANERJEE, 1,2 K. CHATTY, 1 T.P. CHOW, 1 and R.J. GUTMANN 1 1.—Center for Integrated Electronics and Electronics Manufacturing, Rensselaer Polytechnic Institute, Troy, NY 12180-3590, USA. 2.—e-mail: baners3@rpi.edu N-channel, inversion mode MOSFETs have been fabricated on 4H-SiC using different oxidation procedures, source/drain implant species and implant acti- vation temperature. The fixed oxide charge and the field-effect mobility in the inversion layer have been extracted, with best values of 1.8 × 10 12 cm –2 and 14 cm 2 /V-s, respectively. The interface state density, D it close to the conduction band of 4H-SiC has been extracted from the subthreshold drain characteristics of the MOSFETs. A comparison of interface state density, inversion layer mobility and fixed oxide charges between the different processes indicate that pull-out in wet ambient after reoxidation of gate oxide improves the 4H-SiC/ SiO 2 interface quality. Key words: 4H-SiC, MOSFET, field-effect mobility, interface states ports 10,11 of MOSFETs with high mobility (~80–160 cm 2 / V-s) but the exact process conditions leading to high mobility is not well understood yet. The low field-effect mobility in the inversion layer is attributed to a high concentration of interface state density (D it ) close to the SiC conduction band at the SiC-SiO 2 interface. 12 These states trap a substantial part of the electrons generated at the MOS interface and do not contribute to the MOSFET channel current. According to one proposed model, 7 these states are pinned with respect to the valence band regardless of the polytype. In case of 6H-SiC, most of the states lie in the conduction band and hence have less effect on the channel con- duction; in 4H-SiC, they lie just below (0.1–0.2 eV) the conduction band which cause a large degradation in the field-effect mobility due to electron trapping and Coulombic scattering from these charged states. The conductance technique is most widely used 13,14 to measure the interface traps in silicon carbide, but measurements from this technique are limited to the half of the band close to the majority carriers. Hence, MOS capacitance measurement of p-type layers can be used only to probe D it close to valence band. On the other hand, MOS capacitance measurements of n-type layers characterize D it close to the conduction band; but n-channel inversion mode MOSFETs are actually made on p-type layers. Recently, Saks et al. 15 have measured D it close to conduction band on n-channel 6H-SiC MOSFETs fabricated on p-type epilayer. C-V