978-1-7281-8873-7/20/$31.00 ©2020 IEEE 1 A Nine-Level Inverter for Open Ended Winding Induction Motor Drive with Fault-Tolerance Narender Reddy Kedika Department of Electrical Engineering National Institute of Technology, Warangal Telangana, India nit.knreddy@gmail.com Srinivasan Pradabane Department of Electrical Engineering National Institute of Technology, Warangal Telangana, India spradabane@nitw.ac.in AbstractThis paper presents a nine level inverter for an open ended winding induction motor (OEWIM) drive with fault- tolerance property for switch faults. The proposed topology consists of three three-phase inverters with an isolated DC source for each inverter, three bi-directional switches and three capacitors. The three inverters are configured such that they all have a common neutral connection between them. Such configuration provides the advantage of producing peak output voltage twice the source voltage magnitude and hence lower rating voltage sources can be employed. Conventional sinusoidal pulse width modulation techniques are employed for generating gate pulses for the switches in the proposed topology for normal and post-fault operation. A fault-tolerance strategy is proposed for the post-fault operation of the inverter to produce balanced three phase supply. Simulations are carried out in MATLAB/Simulink environment and results are presented. Keywords: multilevel inverter, open end winding, fault-tolerance, switch-faults. I. INTRODUCTION Advances in material science has changed the face of the power systems with increased involvement of power electronic components. The extended operating range of power semiconductor switches aids in designing of multilevel inverters (MLIs) for medium and high voltage applications [1]. However, owing to the advantages such as increased voltage levels, enhanced harmonic profile, reduced voltage stress on power semiconductor devices, flexibility of operation, reduced interference with the communication signals, lower slew rates in output voltages compared to conventional two level or three level VSIs make their application inevitable[2]. With these advantages, MLIs find vast applications in power system transmission and electric drive applications. MLIs with increased number of voltage levels reduces harmonic distortions and elude the need for expensive and bulky filters, hence such MLIs are preferred in drive applications [3]. Nevertheless, the increase in voltage levels are attained with increased number of components, hence the industry is reluctant for such MLIs because of uncertainty of reliability and control complexity [4]. This provides the need for designing MLIs with high number of voltage levels but with fewer components. With increase in component count, the reliability of the system decreases. Failure of a single switch may lead to a complete shutdown of the system. Hence reduced switch-count MLIs with fault tolerance capability find better applications in industrial drives these days [5]. MLIs with increased output voltage levels and reduced control complexity were proposed to extract the best performance of the induction motors in the drive applications. The configuration involving an open end winding induction motor (OEWIM) fed by dual two-level inverters has become a competitive alternative [6]. The three phase windings of the motor are fed from both ends with two identical three-phase VSIs. Induction motor is known for its rugged construction and maintenance free operation and hence finds many applications in industrial drives. The dynamic performance of the drives with induction motor can be enriched by various flexible control schemes while being fed from VSIs [7]-[9]. In [10]-[11], the authors have proposed MLI topologies with single DC source and reduced number of capacitors compared to conventional topologies. Though the output voltage takes multiple levels, the peak voltage obtained across the load terminals is the same as DC link voltage, which triggers to have high rating voltage sources and complex control for capacitor voltage balancing. In [12] the authors have proposed a complex circuit with simple control scheme for drive applications. Some authors proposed inverters with redundant legs such that the additional leg provides fault tolerance to switch open faults [13]. Fault-tolerant MLI topologies with constant output power capability even with the switch faults are also present but the control strategy is complex even for normal operating conditions and hence are preferred only when delivering constant power output and reliability are of utmost importance [14]-[15]. In [16], a modified hardware circuit is employed to deliver power during switch faults resulting in an increase in the cost of the circuit by 50% with reduced output power capacity of 58% only. In [17]-[19], fault- tolerable topologies without any additional hardware requirement and controlled by conventional sinusoidal pulse width modulation (SPWM) techniques are presented. MLI topology for obtaining increased number of levels in output voltage for OEWIMD is presented in [20]. Hence a new MLI topology is proposed for OEWIM drive with fault tolerance capability with simple control scheme for normal and post-fault operation. The proposed topology is designed with conventional three-phase inverters, capacitors and bi-directional switches. A capacitor in series with a bi-directional switch is connected across the lower switch of one leg in each three-phase inverter. Such legs of all the three inverters are combined together to form a neutral path for the inverters. The bi-directional switch is realized by connecting two IGBTs in anti-series with the common- emitter configuration such that both the switches are operated by same switching pulses and hence considered as a single switch for easy analysis of the topology. The proposed configuration yields a peak voltage magnitude of twice the source voltage with nine level across the phase windings of OEWIM with each voltage step-magnitude of half the source voltage. Authorized licensed use limited to: NATIONAL INSTITUTE OF TECHNOLOGY WARANGAL. Downloaded on June 14,2021 at 05:58:08 UTC from IEEE Xplore. Restrictions apply.