An analytical model of SiC MESFET incorporating trapping and thermal effects Sankha S. Mukherjee, Syed S. Islam * , Robert J. Bowman Department of Electrical Engineering, Semiconductor Device Research Laboratory, Rochester Institute of Technology, 79 Lomb Memorial Drive, Rochester, NY 14623-5603, USA Received 10 December 2003; accepted 15 March 2004 Abstract A physics-based analytical model of SiC MESFET incorporating trapping and thermal effects is reported. The model takes into account the field and temperature dependencies of carrier transport parameters and carrier trapping effects. Both surface and substrate traps have been incorporated in the model to calculate the observed current slump in the I –V characteristics. The trapping and detrapping from surface traps control the channel opening at the drain end of the channel that requires the drain resistance to be gate and drain voltage dependent. The substrate traps capture channel electrons at high drain bias when the buffer layer is fully depleted resulting current collapse at low drain bias in the following I –V trace. The detrapping of the captured electrons is initiated with increasing drain bias and the channel electron concentration increases which is accelerated by increased thermal effects. As a result, restoration of collapsed drain current is obtained before the trapping effect is reinitiated at high drain bias. The calculated results using the current model are in good agreement with experimental data. Ó 2004 Elsevier Ltd. All rights reserved. Keywords: SiC; MESFET; Trapping effects; Self-heating effects 1. Introduction In recent years, SiC-based devices have been con- sidered for applications in high-power microwave cir- cuitries. SiC has a bandgap of 3.2 eV and breakdown field of 3.5 MV/cm, which ensure high voltage operation compared to the Si- and GaAs-based FETs [1]. The thermal conductivity of SiC is 4.5 W/K cm, which limits the operating temperature of SiC-based devices in high- power applications. Besides, the high saturation velocity of 2 · 10 7 cm/s and low relative dielectric constant of 9.7 allow SiC-based devices to operate at microwave fre- quencies [1]. Consequently, SiC-based schottky and p–n junction diodes, thyristors, U-shaped trench MOSFETs (UMOSFET), vertical power MOSFETs, static induc- tion transistors (SITs), RF MESFETs, JFETs, BJTs [2,3] have been reported. Sriram et al. reported SiC MESFETs having f max of 25 GHz with a power gain of 8.5 dB at 10 GHz [4] and f max of 42 GHz with a power gain of 5.1 dB at 20 GHz [5]. High power and wide bandgap MMIC amplifiers realized using SiC MES- FETs have demonstrated a power-added efficiency (PAE) of 20.6% along with a drain efficiency of 35.7% and a power gain of 8dB at 2–3 GHz [6]. SiC-based device performance is compromised by traps [7–9] like their GaN-based [10,11] and GaAs-based [12] counterparts. Trapping effects such as current col- lapse in the I –V characteristics, frequency dispersion of transconductance and output resistance, drain- and gate-lag transients are present in these devices which ultimately limits the microwave power output. Modeling of trapping effects is essential for exact evaluation of device performances in low frequency and microwave applications [12]. Royet et al. [13] have reported an analytical model of SiC MESFET incorporating * Corresponding author. Tel.: +1-585-475-2173; fax: +1-585- 475-5845. E-mail address: ssieee@rit.edu (S.S. Islam). 0038-1101/$ - see front matter Ó 2004 Elsevier Ltd. All rights reserved. doi:10.1016/j.sse.2004.05.004 Solid-State Electronics 48 (2004) 1709–1715 www.elsevier.com/locate/sse