A W-band Current Combined Power Amplifier with 14.8dBm P sat and 9.4% Maximum PAE in 65nm CMOS Zhiwei Xu 1 , Qun Jane Gu 2 and Mau-Chung Frank Chang 3 1 HRL Laboratories, Malibu, CA 90265, USA 2 Univeristy of Florida, Gainesville, FL 32611, USA 3 Univeristy of California, Los Angeles, CA 90095, USA Abstract We present a 101-117GHz power amplifier (PA) using two way current power combiner in 65nm bulk CMOS. It delivers up to 14.8dBm saturated output power with over 14dB power gain and better than 9.4% power added efficiency (PAE), which also achieves better than 11.6dBm output P1dB. The PA features three stage transformer coupled differential architecture with integrated input and output baluns. To ensure the stability and improve efficiency, the PA first two stages adopt cascode structure and the last stage utilizes common source structure. A current power combiner is employed to combine the power from two separate PAs. The entire PA core occupies 0.106 mm 2 chip area and dissipates about 200mW. Index Terms Adaptive Bias, CMOS, PAE, Power Amplifier, Power Combiner, Saturated Output Power, W- band. I. INTRODUCTION CMOS power amplifier is the last Holy Grail in the quest for portable single chip wireless communication systems, especially in mm-Wave/sub-mm-Wave frequencies where phase arrays, formed by multiple power amplifiers (PA), are necessary to boost the antenna directivity and transmission efficiency. Deep-submicron CMOS technology enables the mm-Wave transceiver development with high f T and f MAX . But shrinking supply and device breakdown voltages impose significant constraints on PA in output power (P out ), power-added efficiency (PAE), gain, stability and reliability. Many research works have been devoted to 60GHz CMOS PA development for V-band links [1-5]. Radio imaging also demands high Pout and PAE sources at mm-Wave/sub- mm-Wave frequencies [6]. II. POWER AMPLIFIER DESIGN Fig. 1 presents the proposed current combined PA schematic. Transformer coupling, used between stages, tends to pass the signal more effectively compared with capacitive coupling. It can also provide positive voltage gain by choosing proper turn ratios and naturally separate DC biases between stages for individual optimization. All baluns, transformers and power combiners are implemented by stacking the thick (>3μm) top metal with combined second and third top metals (0.9 and 0.22μm). The primary and secondary coils are stacked with offset instead of directly vertical to maximize mutual magnetic coupling with >0.7 coupling coefficient and boost its self- resonant frequency by minimizing the capacitive coupling. The coil turn ratio is designed to provide a larger voltage swing to the next stage input while keeping a smaller swing in its own output to keep PA driver stages away from early saturation for high linearity. A relatively narrow metal width (3-5um) is used to form transformers with reduced coupling capacitance between coils and high enough current (>15mA) handling capability. The transformer self-resonant frequency is designed to be >200GHz to accommodate active device load and parasitics of interconnects. Fig. 1 Schematic of the current combined PA Cascode pre-amplifier is used to enhance signal gain and reverse isolation. However, such structure creates low impedance paths from cascode nodes to ground through stray capacitance of the devices and interconnects. At sub mm-Wave frequencies, this path significantly wastes power and degrades PAE. A T-Network is then inserted at the cascode node to achieve wideband matching between CS and CG devices (Fig. 2). A transmission line stub is used first to transform the impedance from capacitive node A of the CS device drain to node B. A shunt inductor and another transmission line stub are used afterwards to transform the impedance to inductive node C then fulfill the conjugate match. This network mitigates the lossy path and consequently improves the amplifier gain and PAE. It however slightly degrades the amplifier linearity by 0.7dB owing to the increased cascode node impedance. 978-1-4244-8292-4/11/$26.00 ©2011 IEEE