IMTC 2006 – Instrumentation and Measurement Technology Conference Sorrento, Italy 24-27 April 2006 Energy consumption estimation in embedded systems V. Konstantakos 1 , A. Chatzigeorgiou 2 , S. Nikolaidis 1 , Th. Laopoulos 1 1 Electronics Lab. Physics Dept., Aristotle University of Thessaloniki, Thessaloniki, 54124, Greece, 2 Dept. of Applied Informatics, University of Macedonia, Thessaloniki, 54006, Greece Email: vkonstad@auth.gr Abstract – An energy consumption modeling technique for embedded systems based on a microcontroller is presented in this paper. The software tasks running on the embedded system are profiled and their characteristics are analyzed. The type of executed assembly instructions as well as the number of accesses to memory and to the A/D converter is the required information for the derivation of this model. An appropriate instrumentation set up has been developed for measuring and modeling the energy consumption in the corresponding digital circuits. Keywords – power estimation, energy complexity, embedded systems, current measurement I. INTRODUCTION The market of the embedded systems in microelectronics is ever increasing. Many applications are executed on platforms which incorporate embedded microprocessors, memory units and peripherals. Although performance still remains a basic design target, energy consumption has become a critical factor for such systems, especially after the explosion of the portable devices market. This situation has resulted to the requirement for accurate estimation of the energy consumed by the system for executing certain tasks. Although appropriate methods have been developed and certain models have been provided for the estimation of the energy consumption of embedded processors [1,2], there are not published up to now many efforts on modeling the energy consumption of a complete system and practically none of them is directly related to low power instrumentation applications. In [1] the problem of modeling the energy consumption of a processor is examined for the first time. Appropriate energy budget is assigned to each instruction based on measuring the average current of the processor when it executes the specific instruction. Also the energy overhead (inter-instruction effect) resulted by the changing of the processor state as it executes the one instruction after the other is also modeled. The energy consumption for the execution of a software task results by summing the individual budgets of each executed instruction and the inter-instruction effects. Another approach in modeling the energy consumption in embedded pipelined processors based on measuring the instantaneous current of the processor has been developed in [2]. This approach found to present better accuracy and use an instrumentation set up [3] which can be applied to create models for other components, like memories and peripherals. An energy consumption model for a system composed by a processor, an instruction and a data memory has been presented in [4]. This approach aims in defining the energy complexity of a program in a way analogous to the computational complexity. A polynomial expression of the number of executed assembly instructions (approximately mapping the number of primitive operations in the algorithm) and the number of memory accesses to the data and instruction memory is extracted by analyzing the program under study. Since the energy consumption of an independent assembly instruction can be measured and each access to a memory has a known energy cost, an estimate of the system's energy consumption is obtained as a single polynomial with appropriate coefficients. A similar approach is used in [5], where the program whose energy consumption is to be analyzed, is represented by its unique control flow graph. Since the control flow graph of any structured program can be constructed by simply sequencing or nesting simpler graphs, an overall energy metric can be obtained by a hierarchical measure. By defining measures of executed instruction count and memory access count for primitive graphs and the operations of sequencing and nesting, a relatively simple software energy metric is extracted for any graph. Such a metric can be further used for comparing algorithms in terms of their energy consumption. In [6] a complete methodology for estimating the energy consumption of a processor executing software tasks has been proposed. This methodology refers to in-order pipelined processors, which correspond to the most popular architecture used in embedded applications, and a model has been derived for the ARM7TDMI processor with accuracy up to 5%. This approach is based on instruction level energy models. The energy budget of each instruction as well as the energy overhead observed from executing one instruction after the other (this is due to the circuit state changes and is called inter-instruction effect) are estimated based on real measurements of the instantaneous current of the processor. To make the model reasonable appropriate grouping of the instructions has been applied so that instruction with similar characteristics to correspond to the same energy budget. The proposed approach is differentiated in the sense that it targets a general purpose microcontroller usually employed for logging applications in low-power instrumentation systems. The microcontroller is connected to an A/D converter for input retrieval and to an external RAM for storing data. As such, the architecture as well as the operation of the microcontroller is expected to have a power consumption that is not analogous to that of typical