This work was supported in part by the Deanship of Scientific Research, Salman bin Abdulaziz University, Saudi Arabia. Project number is 2014/1/863. FPGA-Based Real-Time Implementation of AES Algorithm for Video Encryption SONIA KOTEL 1,2 , MEDIEN ZEGHID 2,3 , ADEL BAGANNE 1 , TAOUFIK SAIDANI 2 , YOUSEF IBRAHIM DARADKEH 3 , TOURKI RACHED 2 , 1 Laboratory of Information Science and Technology, Communication and Knowledge (Lab-STICC), University of South Brittany (Lorient-France) 2 Laboratory of Electronics and Microelectronics, Faculty of Sciences, University of Monastir, Tunisia 3 College of Engineering -at Wadi Ad-Dawasir, university salman bin abdulaziz, KSA medien.zeghid@fsm.rnu.tn Abstract: - Multimedia data security is becoming an important concern due to the fact that multimedia applications affect many aspects of our life. To deal with the increasing use of multimedia in industrial process, security technologies are being developed. Multimedia encryption algorithms implemented in hardware have emerged as the most viable solution for improving the performance of Multimedia encryption systems. The introduction of reconfigurable devices and high level hardware programming languages has further accelerated the design of encryption technology in FPGA. In this paper, we report on the implementation and hardware platform of a real time video encryption processing. The processing encrypts videos in real time using the AES algorithm. We propose a computationally efficient architecture for AES. The system is optimized in terms of execution speed and hardware utilization. The design as know AES encryption processor is developed in Xilinx System Generator and integrated as a dedicated hardware peripheral to the Microblaze 32 bit soft RISC processor with the EDK embedded system and implemented targeting a Spartan3A DSP 3400 device (XC3SD3400A-4FGG676C). The video encryption processing has been verified successfully. The input comes from a live video acquired from a CMOS camera and the encrypted video is displayed on a DVI display screen. Key-Words: - Multimedia, Encryption, Real Time, AES, Field Programmable Gate Array, Xilinx System Generator (XSG), Microblaze Processor, Embedded Development Kit (EDK). 1 Introduction Nowadays, the wide use of digital images and videos in various multimedia applications brings serious attention for keeping data secure from unauthorized attackers. Video on demand, Internet television and Video conferences are typical examples. Confidentiality is one of the primary concerns for commercial uses of multimedia communication. For example, in a business video conference only the participating members are allowed to receive the audio and video data to protect the privacy of the negotiation. So data encryption is a suitable method to this privacy issue. Multimedia encryption challenges originate from two realities. Firstly, multimedia data have great volumes. Secondly, they need real-time uses [1]. Some video encryption schemes for secure transfer of multimedia information have been developed in the past decade [2]. Many of these approaches exploit the inherent characteristics of video data and the steps taken to compress and encode video information. These techniques can be classified into three types according to the target data selected from compression stages. The first one is named “Spatial Domain” schemes, which apply encryption to the original video data directly as in [3]. The second scheme is named “Bitstream Domain”, which encrypts the code words of compressed bitstream [4]. The third schemes known as “Frequency Domain” has been proposed, which use the results of DCT or DWT transformation and quantization stages from compression process [5]. Commonly the Advanced Encryption Standard (AES) algorithm is used for video encryption [5][6][7]. The AES is the most popular algorithm used in symmetric key cryptography due to its performance and security level [8]. It is considered to be efficient both for hardware and software implementations. Several authors developed different AES architectures for high-speed and high- performance applications [9-10-11-12-13-14-15-16- 17-18-19]. Hardware cryptographic algorithms implementations are, by nature, more physically secure, as they cannot easily be read or modified by Recent Advances In Telecommunications, Informatics And Educational Technologies ISBN: 978-1-61804-262-0 27