IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, VOL. 15, NO. 2, MAY 2002 223 High Yielding Self-Aligned Contact Process for a 0.150- m DRAM Technology Thomas S. Rupp, David Dobuzinsky, Zhijian Lu, Viraj Y. Sardesai, Hang-Yip Liu, Michael Maldei, John Faltermeier, and Jeff Gambino Abstract—This paper describes improvements in the self- aligned contact process for 0.150 m and 0.175 m technology generations. Using a dynamic random access memory cell layout, we show that self-aligned contacts can be formed at 0.175 m ground rules and beyond by using a C F –CH F chemistry. With the improved etch selectivity, gate cap nitride thickness can be reduced, resulting in a smaller aspect ratio for the gate etch, borophosphosilicate glass fill, and contact etch. With a rectangular contact, the area can be increased and the process windows for lithography and etch are improved. The process window for lithography increases by up to 40%, the aspect ratio for the etch and the contact fill is less, and the sensitivity to misalignment is reduced. The combination of rectangular contacts and C F –CH F chemistry greatly enhances the product yield. Index Terms—0.15- m technology, borderless contact, contact shape, DRAM, etch stop, reactive ion etching (RIE), selective etching, self-aligned contact (SAC). I. INTRODUCTION B ORDERLESS or self-aligned contacts are used in semi- conductor memories to reduce the cell area [1]–[4]. For ad- vanced dynamic random access memories (DRAMs), the array contacts are borderless to both the isolation and the gate conduc- tors [5]. At 0.25- m ground rules, a C F –CO reactive ion etch (RIE) chemistry can be used to etch borophosphosilicate glass (BPSG) selective to the silicon nitride (SiN) on top of the gates [5]. The C F –CO chemistry provides very high selectivity by forming polymer on the SiN, but not on the BPSG [6]. Unfortunately there are problems with using C F –CO pro- cesses as device dimensions shrink. At 0.175- m ground rules, excessive polymer formation can occur in the contact, resulting in RIE lag and “etch stop” before reaching the bottom of the contact [7]. An example of etch stop due to excessive polymer formation using C F –CO chemistry is shown in Fig. 1. The problem is aggravated when contacts are misaligned to the gates (Fig. 2). For a misalignment of 60 nm, a square contact [Fig. 2(b)] has a greatly reduced contact area with the Si sub- strate, which can result in high contact resistance or electrical opens. Increasing the size of the square contact would reduce Manuscript received September 20, 2000; revised November 1, 2001. T. S. Rupp is wih the Infineon Technologies Austria AG, A-9500 Villach, Austria (e-mail: thomas.rupp@infineon.com). Z. Lu, H.-Y. Liu, and M. Maldei are with the DRAM Development Alliance, Infineon Technologies, Hopewell Junction, NY 12533 USA. D. Dobuzinsky, V. Y. Sardesai, J. Faltermeier, and J. Gambino are with the DRAM Development Alliance, IBM Semiconductor Research and Develop- ment Center, Hopewell Junction, NY 12533 USA. Publisher Item Identifier S 0894-6507(02)04468-8. Fig. 1. SEM micrograph of selective etch using C F –CO chemistry, prior to SiN liner etch. Incomplete etching of the contact due to excessive polymer formation is observed. RIE lag and the sensitivity to misalignment, but is not possible because the bitline pitch is at the minimum dimensions. Some alternatives to the C F –CO process have been re- ported in the literature [8]–[10]. There have been a number of studies showing that adding O to the C F –CO chemistry can reduce RIE lag. However, at least in some cases the etch selec- tivity to SiN was also reduced. Another approach is to replace CO with other gases, such as CH F [9] or CH F . The higher selectivity of CH F or CH F in addition to C F is explained in the literature by the formation of hydrogen containing, carbon-rich polymers. The C-H bonds of this polymer are more easily broken in the presence of oxygen (i.e., from BPSG) than in the presence of nitrogen (i.e., from SiN). These reports have focused on etch selectivity and structural analysis, but have contained little or no information on electrical properties of contacts. This paper describes improvements in the self-aligned contact process for 0.150- and 0.175- m DRAM generations. The se- lective etch chemistry is varied and optimized to reduce RIE lag while still providing high etch selectivity. Optimization of the contact shape and size results in an increase in the alignment tol- erance and improves the process window for lithography (align- ment and critical dimension) as well as etch and contact fill. 0894-6507/02$17.00 © 2002 IEEE