IEEE ELECTRON DEVICE LETTERS, VOL. 32, NO. 6, JUNE 2011 785 Monolithic Integration of a 4H-Silicon Carbide Vertical JFET and a JBS Diode Rahul Radhakrishnan, Student Member, IEEE, and Jian H. Zhao, Fellow, IEEE Abstract—In many applications, it is desirable to integrate a power switch with an antiparallel diode on the same chip. In this letter, the monolithic integration of a silicon carbide vertical junction field-effect transistor (VJFET) with a junction barrier Schottky (JBS) diode is achieved, and the device is characterized at high voltage. The fabrication process involves no additional steps to that of the VJFET. The VJFET integrated with the JBS diode is measured up to 834 V when turned off and has a specific ON-state resistance of 7.8 mΩ · cm 2 at 100 A/cm 2 when turned on. In addition to validating the high-voltage integration of the freewheeling diode with the power switch, reverse conduction shown here through the integrated diode and the JFET channel can be used in synchronous rectification to significantly reduce the device conduction loss. Index Terms—Power electronics, power field-effect transistor (FET) switches, power integrated circuits, power semiconductor devices, silicon carbide (SiC). I. I NTRODUCTION S ILICON carbide (SiC) is now an established alternative to silicon as a semiconductor for power electronic devices. High critical electric fields, thermal conductivity, and carrier saturation velocity give SiC a superior figure of merit (FOM) V 2 B /R sp-on for high-power applications. SiC Schottky diodes have already been commercialized, and excellent performance has been reported among SiC three- terminal switches [1]. Junction barrier Schottky (JBS) diodes combine the low ON-state voltage drop and the high switch- ing speed of a Schottky diode with the low leakage current of a p-i-n diode. SiC vertical junction field-effect transistors (VJFETs) and JBS diodes offer the best FOM for switching applications in power-converter circuits in the range of 1000 V. In most power electronic applications, a diode is required to be connected antiparallel to the power switch to provide a freewheeling path to the load current. Such a diode needs to have low conduction loss, high reverse blocking, and fast reverse recovery; requirements that are not readily provided by the body diode of a metal–oxide–semiconductor FET. There- fore, many manufacturers combine the power switch and the antiparallel diode in the same package [2]. Manuscript received February 22, 2011; revised March 9, 2011; accepted March 9, 2011. Date of publication April 28, 2011; date of current version May 25, 2011. This work was supported in part by the Office of Naval Research under Contract N00014-08-C-0398 and in part by Dow Corning Corporation. The review of this letter was arranged by Editor S.-H. Ryu. The authors are with the SiCLAB, Department of Electrical and Com- puter Engineering, Rutgers University, Piscataway, NJ 08854 USA (e-mail: rahulrad@gmail.com; jzhao@ece.rutgers.edu). Color versions of one or more of the figures in this letter are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/LED.2011.2132111 Fig. 1. Cross-sectional view of the wafer after device fabrication, showing the SiC layers (blue), the implanted regions (pink), and the dielectric (yellow). To reduce component count, circuit parasitics, cost, and chip size, and improve reliability, it is desirable to integrate power devices within a package monolithically. Such integration of a SiC bipolar junction transistor (BJT) with a diode has been reported [3]. However, as the BJT and the diode do not share many process steps, fabrication is considerably more involved than either the BJT or the diode, and the final device reported did not block high voltage. We have previously reported an attempt at the integration of a SiC VJFET and a JBS diode [4]. However, that device did not block high voltage because of shortcomings in the designs of isolation rings between the JFET and the diode and the Schottky interface of the diode. In this letter, the width of the isolation rings is optimized, and a planar JBS diode is designed for easier fabrication of a smooth Schottky junction with no additional fabrication steps from that of a VJFET. The devices were successfully fabricated and characterized at high voltage. II. DEVICE DESIGN AND FABRICATION The structure of the device, as shown in Fig. 1, is based on a trenched and implanted VJFET [1], [5] modified by introducing a JBS region between the JFET and the outer p + -implanted guard rings. 4H-SiC wafers used in this letter have three epitax- ial layers grown on the n-type substrate. The first layer is 15-μm thick and doped N-type at 1.5 × 10 16 cm −3 , over which there is a 0.8-μm thick layer doped N-type at 7 × 10 18 cm −3 and a 1-μm-thick final cap layer doped N-type at 3 × 10 19 cm −3 . Deep trench etching by CF 4 /O 2 - and C 4 F 8 -based Bosch process in an inductively coupled plasma etcher gave highly vertical sidewalls [6]. Tilted implantation was done to form the sidewall gate and create highly vertical and uniform chan- nels with a channel opening of ∼ 0.5 μm. Then, vertical implantation formed gate at the trench bottom, p + regions in 0741-3106/$26.00 © 2011 IEEE