Native oxide free polycrystalline/single crystal Si interface obtained by in situ cleaning: eects on the electrical performances of polysilicon emitter transistors R.A. Puglisi a, b, *, S.A. Lombardo b , C. Spinella b , S.U. Campisano a, b , H. Monchoix c , P. Rabinzohn c a Dipartimento di Fisica dell'Universita Á, Unita Á INFM, Corso Italia, 57, I-95129 Catania, Italy b Consiglio Nazionale delle Ricerche (CNR), Istituto Nazionale di Metodologie e Tecnologie per la Microelettronica (IMETEM), Stradale Primosole, 50, I-95121 Catania, Italy c Applied Materials, France-11B, Chemin de La Dhuy, 38240 Meylan, France Received 1 May 1999; accepted 19 May 1999 Abstract We compare polysilicon emitter bipolar transistors fabricated by using dierent treatments of the interface between single crystal and polycrystalline Si (polysilicon) in the emitter region. One of the treatments consisted in an in situ cleaning of the silicon surface performed in the deposition chamber prior to the polysilicon deposition, resulting in an oxide free interface. A detailed structural and electrical characterization of transistors with and without an oxide free interface is presented. It is shown that, even if common emitter current gain decrease is observed, a strong improvement of base resistance and breakdown voltage can be achieved, while maintaining noticeable high frequency characteristics. # 1999 Elsevier Science Ltd. All rights reserved. 1. Introduction Adoption of polysilicon into silicon bipolar inte- grated circuit processing has given considerable improvements in packing density and switching per- formance [1]. One main feature of these devices is that polysilicon can be used as diusion sources for the doping of emitter and of intrinsic base layer. Moreover, self-alignment of the emitter and base con- tact regions can be easily achieved. One of the pro- blems of scaling conventional bipolar transistors is the decrease of the common emitter current gain, which occurs as the vertical dimension shrinks [2]. However, in the case of an n±p±n transistor, by intentionally forming a thin oxide layer at the polysilicon/single crystal Si interface in the emitter region, it is possible to obtain large gain improvements [3]. This is attribu- ted to the larger tunneling probability of the electrons through this oxide layer compared to holes [4]. In that case it is possible to raise again base doping concen- tration, i.e. to decrease base resistance, while maintain- ing a reasonable current gain. However, all of the above ®ndings refer to conventional LPCVD polysili- con deposition systems, which at the moment do not allow a good control of this interface. In fact, during the air break after the cleaning of the surface and the emitter polysilicon deposition, usually an oxide ®lm Solid-State Electronics 43 (1999) 2085±2091 0038-1101/99/$ - see front matter # 1999 Elsevier Science Ltd. All rights reserved. PII: S0038-1101(99)00162-8 * Corresponding author. Present address. Watson Laboratory of Applied Physics, Caltech, Mail Stop 128-95, Pasadena, CA 91125, USA. Tel.: +1-626-395-2193; fax: +1- 626-449-5678. E-mail address: rosaria.puglisi@ct.infn.it (R.A. Puglisi)