ELSEVIER PH:S0026-2692(97)00007-.4 Microelectronics Journal 28 (1997) 691-701 O 1997 Elsevier Science Limited Printed in Great Britain. All rights reserved 0026-2692/97/$17.00 Sub-micron strained Si:SiGe heterostructure MOSFETs P.A. Clifton*, S.J. Lavelle and A.G. O'Neill Department of Electrical and ElectronicEngineering, University of Newcastle, Merz Court, Newcastle upon Tyne NE1 7RU, UK Si:SiGe heteroepitaxy raises the prospect of combining the attributes of high mobility channel engineering with main- stream silicon MOS technology. The design of the hetero- epitaxial structure is investigatedhere by means of a response surface methodology study of strained SiGe p-channel heterostructure MOSFETs using two-dimensional numer- ical device simulation. The reduced effective density of states inherent in a strained channel layer is included and shown to result in a lower inversion charge concentration in the channel. Particular performance metrics evaluated are the gate bias range for buried channel operation and the maxi- mum channel charge, wEich determines the peak transcon- ductance (g,,) and maximum current drive. It is shown that at the high levels of sub-channel doping appropriate for MOSFETs with sub-micron channel lengths, a small or non-existent window of buried channel operation may arise due to the onset of parasitic surface inversion. Various means of increasing the contribution of strained channel conduc- tion to the drain current are considered, including composi- tion grading and modulation doping. The conclusions are equally applicable to strained silicon n-charmel hetero- structure MOSFETs. © 1997 ElsevierScience Ltd. 1. Introduction r-r~he very high 300 K drift mobilities reported I f or electrons in tensile strained silicon P.A. Clifton is currently with Silvaco International, 4701 Patrick Henry Drive #1, Santa Clara, CA 94025, USA. (2800cm2/V.sec [1]) and for holes in compres- sively strained SiGe (800cmZ/V.sec [2]) suggest that these materials hold great promise for appli- cation in ultra-high speed silicon MOS integrated circuits, both CMOS [3] and mixed digital- analogue at microwave frequencies. Compres- sively strained SiGe is obtained by direct heteroe- pitaxy on Si substrates, while silicon layers may be grown epitaxially under tension on 'virtual substrates' consisting of relaxed SiGe, itself grown on silicon substrates [4]. These strained layers respectively exhibit hole and electron low field mobilities which are superior to those found in bulk silicon. The improved mobility inherent in the strained layers arises from both thc lower density of statcs effective mass of carriers and reduced intervalley carrier scattering due to a lifting of the band degeneracy [5]. It is fortuitous that strained silicon forms a type II heterostructure on relaxed SiGe, providing a favourable conduction band o~et [5] for an n- channel FET in which electrons tend to reside in the higher mobility Si layer. Conversely, SiGe grown pseudomorphically on a silicon substrate has a smaller bandgap than Si and most of the difference is in the valence band offset of this 691