JOURNAL OF LIGHTWAVE TECHNOLOGY, VOL. 27, NO. 7, APRIL 1, 2009 893 Differential Resistance Testing for InP-Based Semiconductor Optical Amplifiers Michael Wieckowski, Student Member, IEEE, Martin Margala, Senior Member, IEEE, Martin H. Hu, Senior Member, IEEE, and Hong Ky Nguyen, Member, IEEE, Member, OSA Abstract—A new method for electrically measuring optical per- formance degradation in InP-based semiconductor optical ampli- fiers (SOAs) is presented. It is shown that this degradation can be directly qualified through measurements of electrical subthreshold differential resistance. Experimental measurements are presented along with a theoretical analysis to demonstrate a proposed aging signature. Furthermore, two system designs are presented based on using this signature for enhancing device testability. Index Terms—Aging, reliability, semiconductor optical ampli- fiers, testing. I. INTRODUCTION S EMICONDUCTOR optical amplifiers (SOAs) are be- coming increasingly important system components for applications in optical networking and high-speed processing. This is largely due to recent advances in integration, device fabrication, and supporting electronics that have made the nonlinear characteristics specific to SOAs highly valued tools for switching, wavelength conversion, and modulation [1]–[5]. This increasing demand for SOAs has in turn yielded greater interest in their reliability and testability, topics that have received limited attention and have made scant appearances in [6]–[9]. The goal of this paper is to provide a new methodology for reliability characterization and testing of SOAs. Through accel- erated aging and performance monitoring in the electrical and optical domains, a new aging signature is demonstrated and pro- posed for applications in testing. In addition, two systems based upon this signature are presented for qualifying SOAs during and after fabrication. The remainder of this paper is structured as follows: Section II describes the accelerated aging experiment in detail. Sections III and IV present the measured characterization results over 1500 h of aging. Section V develops the theoretical Manuscript received September 13, 2007; revised February 16, 2008. Current version published April 17, 2009. This work was supported in part by Corning Inc., Infotonics Technology Center, and by The University of Rochester CEIS. This work was performed at the University of Rochester, Department of Elec- trical and Computer Engineering, Rochester, NY 14627 USA. M. Wieckowski is with the Electrical Engineering and Computer Science Department, University of Michigan, Ann Arbor, MI 48105 USA (e-mail: wieckows@umich.edu.) M. Margala is with the Electrical and Computer Engineering Depart- ment, University of Massachusetts, Lowell, MA 01854 USA (e-mail: Martin_Margala@uml.edu). M. Hu and H. K. Nguyen are with Corning Incorporated, Corning, NY 14831 USA (e-mail: HuMH@corning.com). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/JLT.2008.922213 framework surrounding these results. Section VI discusses the results in the context of practical applications. Section VII con- cludes the paper. II. EXPERIMENTAL SETUP The SOAs considered in this paper were InP dilute mode de- vices with an active region composed of tensile-strained mul- tiple quantum wells (MQWs) sandwiched between two sep- arate-confinement InGaAsP heterostructure layers. The active waveguide was tilted 10 degrees off axis and the facets were an- tireflection coated to achieve reflectance on the order of . In addition, and doped InP layers provided current blocking around the active region to reduce leakage paths and improve electrical confinement [10]. The SOAs were soldered and wire- bonded to a package-specific printed circuit board (PCB), which was further submounted to another PCB customized for an ac- celerated aging system. Since the goal of this paper was to ana- lyze degradation characteristics, the SOAs used were intention- ally chosen from a fabricated wafer whose devices had shown significant optical performance degradation during a previous lifetest evaluation. A. Accelerated Aging Stimulus The normal operating condition for the SOAs used in this experiment was a bias current of 300–500 mA and a temper- ature of 25 . In order to greatly increase the environmental stresses imposed upon the SOAs, a system used for accelerated aging was employed to bias multiple SOAs at 700 mA in a tem- perature-controlled oven at 70 . The SOA junction tempera- tures were estimated to be 52.5 and 123.9 under 500 and 700 mA bias currents respectively. B. Optical Performance Characterization At 500-h intervals of accelerated aging, the SOAs were se- quentially affixed to an optical test bench, shown in Fig. 1. A tunable laser, an optical attenuator, and a polarization controller were connected in series to provide a CW source for injection into the SOA. A 95/5 optical tap was used to monitor the power of this source. Two optical switches and two optical circulators were used to route the CW source to the SOA under test and then direct its output to a power meter and an optical spectrum analyzer (OSA). Two lensed single-mode fibers L1 and L2 al- lowed for high efficiency ( ) coupling to both facets of the SOA. The temperature of the SOA was controlled using four thermoelectric modules, and a thermistor wire-bonded directly next to the SOA was used for closed-loop temperature feedback. 0733-8724/$25.00 © 2009 IEEE Authorized licensed use limited to: University of Michigan Library. Downloaded on October 30, 2009 at 18:01 from IEEE Xplore. Restrictions apply.