Embed Scripting inside SystemC Jo¨ el Vennin, St´ ephane Penain Prosilog 8, rue traversiere 95000 Cergy, France vennin@prosilog.com , penain@prosilog.com Luc Charest, Samy Meftali and Jean-Luc Dekeyser LIFL - USTL Cit´ e Scientifique, 59655 Villeneuve d’Ascq cedex, France meftali@lifl.fr, charest@lifl.fr and dekeyser@lifl.fr Abstract Embedded system designs and simulations become tedious and time consuming due to the complexity of modern applications. Thus, languages allowing high level description, such as SystemC, are more and more used. We present in this paper a new methodology allowing scripting inside SystemC. We integrate both SystemC and Python within a single framework for system designs and simulations called SystemPy. Communication is performed using a Simple Wrapper and an Interface Generator(SWIG). SystemPy allows dynamic IP changes during the simulation. This makes designers able to perform a quick architecture exploration without stopping the simulation process. Steps and performances of our framework are illus- trated on mixed SystemC - Python system. 1 Introduction Software and hardware architecture research aim generally at reducing costs of the platform creation process and decreasing time to market. Respecting these constraints, several works have been realized around existing problems in software and hardware domains. We define as dynamic interaction the possibility we give to the end user to perform momen- tary simulation interruption, component replacement or new test bench insertion without even having to stop the simulation process. Nowadays a set of existing ADLs (Architecture Description Language) allows system design at different abstraction levels from the functional to the register transfer (RTL) one. They are especially made for a specific domain while classical languages are more generic. Unfortunately, most of these languages do not provide the possibility to interact with them dynamically in an easy way. Thus, this lack of language flexibility makes the interconnection of several components together also known as architectural phase, very painful and error prone. We find for instance this kind of problems in SystemC [Ini, Amo00]. SystemC is a hardware description language, appeared in 1999 as a new language for hardware description in system design. It is a C++ library which allows hardware, software and system-level modeling. SystemC simulators become more and more mature including new functionalities. In fact, the first version was RTL system design oriented. With SystemC version 2.0, abstract layers have been added to SystemC in order to get more and more design abstraction [Pan01]. These enhancements brought transaction level modeling capability to the initial language specification. SystemC however falls into the category of languages where the compositional step is tedious. Of course, it is possible to use a framework to realize the compositional step, but because of the