Anomalous Electron Mobility in Extremely-Thin SOI (ETSOI) Diffusion Layers with SOI Thickness of Less Than 10 nm and High Doping Concentration of Greater Than 1×10 18 cm -3 Naotoshi Kadotani 1 , Tsunaki Takahashi 1 , Kunro Chen 1 , Tetsuo Kodera 2 , Shunri Oda 2 , and Ken Uchida 1,3 Department of Physical Electronics 1 & Quantum Nanoelectronics Research Center 2 , Tokyo Institute of Technology, 2-12-1-S9-12, Ookayama, Meguro-ku, Tokyo, 152-8552, Japan PRESTO 3 , Japan Science and Technology Agency, 4-1-8 Honcho, Kawaguchi, Saitama, Japan Phone/Facsimile: +81-3-5734-3854, E-mail: {kadotani, uchidak}@ssn.pe.titech.ac.jp Abstract Carrier transport in heavily doped extremely thin sili- con-on-insulator (ETSOI) diffusion layers with SOI thickness of less than 10 nm was thoroughly studied. We found that electron mobility (μ e ) in heavily doped ETSOI diffusion layer is totally different from μ e in heavily doped bulk Si. In ET- SOI diffusion layers with SOI thickness ranging from 5 nm to 10 nm μ e is enhanced, compared with μ e in heavily doped bulk Si. This enhancement is caused by the reduced number of ions which interact with carriers in ETSOI. On the other hand, in ETSOI with SOI thickness of less than 2 nm μ e is degraded, compared with μ e in heavily doped bulk Si. The degradation is primary due to the scattering induced by SOI thickness fluctuations. μ e in heavily doped ETSOI with SOI thickness of less than 2 nm is further decreased as doping concentration increases, which results from the enhanced po- tential fluctuations by Coulomb potentials made by randomly distributed ions. Introduction MOSFETs fabricated on extremely thin SOI layer (ET- SOI) have been attracted growing interests, because of their immunity to short channel effects (SCE) [1-3]. Previous works on ETSOI devices have revealed that quantum me- chanical (QM) effects greatly influence carrier transport in ETSOI channel [3]. However, few studies have been reported on carrier transport in heavily doped ETSOI diffusion layers. Since parasitic resistance in source/drain diffusion layers is a serious issue in scaled MOSFETs, the understanding on car- rier transport in heavily doped ETSOI diffusion layer is in- dispensable for designing advanced ETSOI devices as well as 3D MOSFETs [4-6] (Fig. 1). This paper is the first to report carrier transport in heavily doped ETSOI diffusion layers. The electron mobility (μ e ) in heavily doped ETSOI diffusion layers was thoroughly studied for various SOI thicknesses (T SOI ). We found that μ e in heav- ily doped ETSOI diffusion layers is totally different from μ e in heavily doped bulk Si. We observed that μ e is enhanced in heavily doped ETSOI when T SOI ranges from 5 nm to 10 nm, whereas μ e degrades as dopant concentration increases in heavily doped ETSOI with T SOI of 2 nm. Doping to ETSOI Layer & Device Structure The fabrication of heavily doped ETSOI is not an easy task, because damages in crystal quality caused by high energy ion implantations (I/I) cannot be completely recovered in ETSOI. In order to avoid these damages during I/I, phos- phorous (P) ions were implanted at initial stage (the SOI thickness is approximately 60 nm). The high-temperature annealing (1000 °C, 30 min) in N 2 ambient was then per- formed in order to activate phosphorous ions and to recover crystal quality of SOI. The SOIs were then thinned down to less-than-10-nm scale by repeating thermal oxidation & thermal oxide striping processes by HF solutions (Fig. 2). Fig.3 shows the SIMS profile of phosphorous in thick SOI and ETSOI, indicating ETSOI has almost the same phos- phorous concentration as that of thick SOI in spite of the re- peated thermal oxidation process. Fig.4 shows the ESR spec- trums of heavily doped ETSOI, showing that phosphorous ions were successfully activated even in ETSOI with T SOI of less than 3 nm. It is thus confirmed that we successfully fa- bricated less-than-3-nm ETSOI with the active donor con- centration (N D + ) of greater than 1x10 19 cm -3 . In order to evaluate the electron density (N s ) as well as Hall mobility (μ H ) for devices with various T SOI ’s, the Hall bar structure with the poly-Si gate electrode is employed (Fig. 5). The gate electrode enables us to measure C-V characteristics of the devices. From C-V characteristics, the flat band voltage (V FB ) is extracted (Fig. 6). Under the flat band condition, it is possible to investigate carrier transport in neither surface ac- cumulation nor inversion layers but heavily doped diffusion layers in ETSOI body. μ e Enhancement: Reduced Coulomb Scattering in ETSOI μ e in heavily doped 50-nm-thick (bulk-like) SOI diffusion layers was firstly studied. In our experiments, Hall mobility (μ H ) and surface electron density (N s ) are evaluated through the Hall effects. Then, μ H is transformed to the effective mo- bility (μ eff ) using the Hall factor (γ); μ eff =μ H /γ [8]. Fig. 7 shows the relationship between μ eff and N D + in 50-nm-thick SOI, depicting that μ eff in thick SOI diffusion layers are com- pletely the same as μ eff in bulk Si [9]. μ e in heavily doped ETSOI with T SOI of less than 15nm was then studied. Since μ eff in ETSOI channel is greatly re- duced because of increased phonon scattering (5 nm < T SOI < 20 nm) [10], it is anticipated that μ eff in heavily doped ETSOI would be reduced as T SOI decreases. Fig. 8 shows the meas- ured μ eff in heavily doped ETSOI with T SOI ranging from 5nm to 15nm. In contrast with our initial anticipation, μ eff in heav- ily doped ETSOI (T SOI = 10.1 nm and 5.6 nm, N D + > 10 18 cm -3 ) is greater than μ eff in heavily doped bulk Si. One might wonder that the observed μ eff enhancement is 3.3.1 IEDM10-54 978-1-4244-7419-6/10/$26.00 ©2010 IEEE