A System-On-Chip Approach in Designing a Dedicated RISC Microcontroller Unit Using the Field-Programmable Gate Array Elena Roxana Buhus *, Alexandru Lazar ** Gheorghe Asachi Technical University, Faculty of E. T. T. I - Microtechnology Department, Boulevard Carol I No.11, Zip 700506, Iasi- Romania Adriano Tavares ^ Minho University -Industrial Electronics Department, Campus de Azurem 4800-058, Guimaraes - Portugal elenar.buhus@gmail.com*, alazar@etc.tuiasi.ro **, atavares@dei.uminho.pt ^ Abstract— Standard processors have logical resources necessary for implementing various calculating platforms, capable to execute applications in different fields such as communication, command and control or signal processing. However, the sequential aspect of executing the instructions, the speed limit given by the access to the memory block and the standard architecture of the processors, dictate some of the systems limitations regarding its performance. A solution that can increase the performance for a specified application, is the hardware implementation of the calculating platform using the Field Programmable Gate Array. This paper presents a principle on how performance can be improved in the context of Microcontroller Units applications, using the Instruction Set Architecture of a conventional Reduced Instruction Set Computer, over Field Programmable Gate Array. It concludes how this idea could be suggested as a principle at a higher scale, in designing dedicated System-On-Chip with the Field Programmable Gate Array. Keywords –FPGA, specified application, dedicated SOC, customized IP design, fast prototyping I. INTRODUCTION Conventional microcontroller architectures vary widely, offering the possibility for implementing various calculating platforms, capable to execute applications in different fields such as communication, command and control or signal processing. The application is being executed by decoding a set of instructions taken from a software code, based on the information kept in memory blocks. However, the sequential aspect of executing the instructions, the speed limit imposed by the access to the memory block and the standard architecture, are some constrains regarding the performance of the system. The limitations introduced by the standard architectures become a problem, when for a specified application to a standing context a high performance and low cost implementation is demanded. These circumstances, take us to the next question: how to design a system that will be a trade-off between, reaching the specified application and costs? This question identified an important aspect, as a conjecture for this work, namely that the developed system would be dedicated for the specified application. Therefore, the designer outlines that the application can be established before the effective hardware implementation. The work presents a hardware implementation with the FPGA (Field Programmable Gate Array), using a conventional microcontroller ISA (Instruction Set Architecture) for shaping the specified application, as a possible solution. The settled conjecture allows a better focus on how the system should be conceived to meet the performances, altogether with a minimum development process and optimum usage resources. The logical resource management is important from early stage of the design, in the sense that after prototyping the final version of the design, we can choose a more suitable FPGA with more or less logical gates, depending on the used resources. Also, the cost for the FPGA used to implement the final design is being controlled, increasing the probability for an even lower cost hardware implementation. These details are very important in developing designs that could be forwarded to be evaluated for production [10][3]. The main target for this approach was to improve an 8-bit core RISC (Reduced Instruction Set Computer) architecture microcontroller, and to find solutions in designing customized IP (Intellectual Property) peripherals able to execute new adapted instructions, that meet the application domain. The selection and adapting process for the new instructions aimed for a new usage, is made under the criterion presented in Subsection II.A. The proposed idea could be considered as a new perspective in building a SOC-Dedicated for a Specific Application. To simplify the representation of the developed principle, we will name it SOC-DSA. Compared with other approaches in building IC (Integrated Circuits) for a specific application [6], this one 2010 Fifth International Conference on Systems 978-0-7695-3980-5/10 $26.00 © 2010 IEEE DOI 10.1109/ICONS.2010.40 114