2604 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 58, NO. 8, AUGUST 2011 InP DHBT-Based IC Technology for 100-Gb/s Ethernet Rachid Driad, Josef Rosenzweig, Robert Elvis Makon, Rainer Lösch, Volker Hurm, Herbert Walcher, and Michael Schlechtweg Abstract—It is now clear that 112-Gb/s data rate is the next step in the network evolution (100-Gb/s Ethernet). Due to its high speed and high breakdown voltage, the InP double-heterojunc- tion bipolar transistor (DHBT) technology is particularly suited for signal processing and high-speed communication systems. This paper summarizes our InP DHBT device and integrated circuit (IC) technology developed for ≥ 100-Gb/s-class medium- scale mixed-signal ICs. Key features and issues important for the growth and manufacturing of InP DHBTs with step-graded collec- tors are first discussed. The molecular-beam-epitaxy-grown tran- sistors have cut-off frequencies (f T and f max ) of over 350 GHz, current gains of ∼90, and common–emitter breakdown voltages of > 4.5 V. Using this technology, we then fabricated and succeeded in 112-Gb/s testing of multiplexers and integrated clock and data recovery/1:2 demultiplexer ICs and modules with very clear eye waveforms. Using the same technology, a distributed amplifier intended for use as a modulator driver exhibited an output voltage swing of ∼2V pp . These building-block ICs combine high-speed operation with high signal quality and enable 112-Gb/s optical- fiber transmission. Index Terms—Double-heterojunction bipolar transistors (DHBTs), InP, integrated circuit (IC) technology, mixed analog/ digital ICs. I. I NTRODUCTION T HE next-generation transmission technology for 100-Gb/s Ethernet (GbE) systems is being actively investigated and is expected to be deployed in metro and local-area networks. To achieve the required 100 Gb/s plus additional forward error correction, most of the development is currently focused on systems using multilevel modulation formats with lower sym- bol rates (56 GBd) [1]. Such systems are powerful in bridging long distances but quite complex and costly. On the other hand, traditional intensity-modulated two-level electrical time- division multiplexed (ETDM) transmission systems with a high symbol rate (100 GBd), which have the potential to provide cost-effective systems, are also investigated [2]. However, the performance of these systems depends on the development of Manuscript received March 25, 2011; revised May 12, 2011; accepted May 12, 2011. Date of publication June 20, 2011; date of current version July 22, 2011. This work was supported by the European Commission under the Sixth Research Framework Program through Project High-Speed Electro- Optical Components for Integrated Transmitter and Receiver in Optical Com- munication (HECTO). The review of this paper was arranged by Editor A. Haque. R. Driad, J. Rosenzweig, R. Lösch, V. Hurm, H. Walcher, and M. Schlechtweg are with the Fraunhofer Institute for Applied Solid State Physics, 79108 Freiburg, Germany (e-mail: rachid.driad@iaf.fraunhofer.de). R. E. Makon is with the Test and Measurement Division, Rohde & Schwarz, 81671 Munich, Germany. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TED.2011.2157927 electronic modules, as well as electrooptical and optoelectri- cal conversion modules that operate at bandwidths close to 100 GHz and beyond. Remarkable research and development efforts have been devoted to the design and fabrication of the digital and ana- log electronic building blocks. The multiplexing (MUX) and demultiplexing (DEMUX) operation at data rates of 100 Gb/s has been reported using various technologies, including high- electron mobility transistors [3] and heterojunction bipolar transistor (HBTs) [4]–[6]. Most investigations were, however, carried out on chip-level components. In contrast, the de- velopment of ultrabroad-band amplifier components capable of driving optical modulators has been more challenging for operation at 100 Gb/s and beyond. The ability to combine high gain, large bandwidth, and high breakdown voltage in a transistor makes InP double HBTs (DHBTs) the candidates of choice for making the required key building blocks of 100-Gb/s serial transceivers. Using InP- based DHBTs, operation frequencies beyond 700 GHz have been demonstrated [7]. Moreover, the high collector break- down voltage provided by the DHBT technology is particularly suitable to realize the critical high-voltage amplifiers driving optical modulators [8]–[10]. Furthermore, InP-based ICs offer the potential advantage of monolithic integration with optical sources and detectors. In this paper, we report on the development of high-speed digital, analog, and mixed-signal ICs intended for use in > 100 Gb/s applications, using an in-house developed InP DHBT technology. The demanding specifications for > 100-GHz and > 100-Gb/s ICs (in both analog and digital domains) required first the optimization of the main device figures of merit. Subsequently, high-speed and large-bandwidth ICs and modules have been achieved with moderate scaling and standard manufacturing processes. All components have successfully been tested with nonreturn-to-zero (NRZ) on–off keying data signals at 112 Gb/s. In Sections II and III, we present material growth using molecular beam epitaxy (MBE), main features of the DHBT layer structure, and IC fabrication process. In Section IV, we discuss the achieved performance of the DHBT devices. The performance of 2:1 MUX, clock and data recovery (CDR)/1:2 DEMUX, and distributed amplifier (DA) ICs and modules, which are well suited for 100-GbE systems, are finally presented in Section V. II. EPITAXIAL GROWTH The DHBT structure and related calibration epilayers were grown in-house on 3 ′′ or 4 ′′ semiinsulating InP substrates using 0018-9383/$26.00 © 2011 IEEE