3912 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 58, NO. 11, NOVEMBER 2011 Understanding the Charge Transport Mechanism in VRS and BRS States of Transition Metal Oxide Nanoelectronic Memristor Devices Branden Long, Jorhan Ordosgoitti, Rashmi Jha, Member, IEEE, and Christopher Melkonian, Member, IEEE Abstract—This report presents the charge transport mecha- nisms in the virgin resistance state (VRS) and breakdown re- sistance state (BRS) of transition metal oxide memristor devices with tungsten (W) electrodes. The devices behaved as reconfig- urable diodes up to ±3.2 V in VRS without the need of any intentional electroforming. The mechanism of conduction in VRS was observed to be governed by tunneling at low temperatures and Frenkel–Poole (F-P) conduction at high temperatures. The BRS was achieved by applying sweep voltages above ±3.2 V after which the device failed to reset. The mechanism of charge transport in BRS was governed by ohmic conduction through defect-assisted localized conduction channels. The barrier height for F-P conduction in VRS and activation energy of defects for ohmic conduction in BRS were experimentally measured. Index Terms—Charge transport, memristor, resistive switching, transition metal oxide (MOx). I. I NTRODUCTION I N RECENT years, the nanoelectronic memristor devices have gathered much research attention for the next genera- tion of logic and memory applications [1]–[4]. These devices are highly scalable and offer an ultimate route of scaling and densification beyond the fundamental limits of the silicon CMOS technology [5]–[8]. With respect to the device config- uration and materials used, the memristor devices are similar to the resistive RAM (RRAM) devices. However, in terms of functionality, memristor can be interpreted as a superset of RRAM. In RRAM, the focus is to achieve two resistive states (R ON and R OFF ) by the application of set/reset voltage pulses, whereas in memristor devices, multiple conductive states and an analog change in conductance are also of interest. There have been significant research activities recently in the areas of memristor and RRAM devices [8]–[14]. However, there are Manuscript received November 1, 2010; revised April 25, 2011, June 9, 2011, and July 21, 2011; accepted July 27, 2011. Date of publication September 26, 2011; date of current version October 21, 2011. The review of this paper was arranged by Editor Y.-H. Shih. B. Long and J. Ordosgoitti are with the Department of Electrical Engineering and Computer Science, University of Toledo, Toledo, OH 43606-3390 USA. R. Jha was with IBM Semiconductor Research and Development Center, East Fishkill, NY 12533 USA. She is now with the Department of Electrical Engineering and Computer Science, University of Toledo, Toledo, OH 43606- 3390 USA (e-mail: rashmi.jha@utoledo.edu). C. Melkonian is with the Midwest MicroDevices LLC, Toledo, Ohio 43604 USA (e-mail: cmelkonian@midwestmicrodevices.com). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TED.2011.2165845 several unanswered questions of fundamental nature pertaining to our lack of understanding on the charge transport mechanism in transition metal oxide (MOx) memristor devices and depen- dence of the switching mechanism on the electrodes and MOx stack materials. Furthermore, the fundamental limits of this technology in terms of reliability and mechanism of failure have not been sufficiently addressed in any of the previous work. In this paper, we report the switching behavior of TiO 2-x /TiO 2 stack-based memristor devices with W elec- trodes. The rationale behind using W over some of the other reported metals, such as Pt, lies in the fact that W is already used in the back-end-of-line CMOS process flow in the current products and will be easy to integrate in the novel devices. The chemical vapor deposition techniques for W is well developed, which will ensure better step coverage and uniformity for the nanoscale memristor devices. In addition, the patterning techniques of W using reactive ion etching are well controlled, which will be important for achieving controllable nanoscale feature sizes, and last but not least, W shows better adhesion properties with oxides than Pt, which is known to suffer from poor adhesion problems and might impose serious integration issues in these devices without an adhesion promoter layer [15], [16]. The switching characteristic in this paper was primarily studied by dc voltage sweeps under vacuum, and temperature- dependent I –V characterizations were performed to understand the mechanism of charge transport. II. EXPERIMENTAL PROCEDURE A. Memristor Device Fabrication Memristor devices consisting of W/TiO 2-x /TiO 2 /W stacks were fabricated on p-type silicon (Si) substrates. A schematic diagram of the device is shown in Fig. 1. The p-Si substrate was cleaned in a dilute HF solution, and bottom tungsten (W) electrode of 100 nm was deposited using RF magnetron sput- tering. The base pressure of the chamber was below 10 -6 torr to obtain a high-purity W film. The bottom electrode (BE) was then patterned using a shadow mask. Thereafter, 100 nm of TiO 2-x stack and 25 nm of TiO 2 stack were deposited by reactive sputtering of Ti in oxygen with a substrate temperature of 300 ◦ C. Oxygen-deficient TiO 2-x and stochiometric TiO 2 were obtained by varying the Ar/O 2 ratio during the reactive sputtering [17]–[20]. The TiO 2-x /TiO 2 stack was sequentially deposited without breaking the vacuum to achieve a precise control of the oxygen vacancy V o distribution in the film [3]. 0018-9383/$26.00 © 2011 IEEE