IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, VOL. 58, NO. 7, JULY 2011 407 A 400-nW 19.5-fJ/Conversion-Step 8-ENOB 80-kS/s SAR ADC in 0.18-μm CMOS Jia Hao Cheong, Kok Lim Chan, Pradeep Basappa Khannur, Senior Member, IEEE, Kei Tee Tiew, and Minkyu Je, Member, IEEE Abstract—As the low-power-consumption requirement of inte- grated circuits for biomedical applications (e.g., wearable sen- sor nodes operating with and without batteries, and implantable medical devices powered by batteries and wireless charging) becomes more stringent, the data converter design evolves to- ward mircrowatt and submircrowatt power consumption. In this brief, a 400-nW successive approximation analog-to-digital con- verter (SAR ADC) is presented. A trilevel switching scheme with common-mode reset, redundant algorithm, and a time- domain comparator is proposed and implemented to achieve ul- tralow power consumption. The redundant algorithm mitigates the offset error caused by the level mismatch of the trilevel switching scheme, whereas the trilevel switching scheme simplifies the switching logic of the redundant algorithm. Fabricated in a 0.18-μm CMOS process, the proposed SAR ADC achieves a signal-to-noise-and-distortion ratio of 50 dB, which is equivalent to an 8-bit effective number of bits, at an 80-kS/s conversion rate. The figure of merit is 19.5 fJ/conversion step. Index Terms—Common-mode reset, redundant algorithm, suc- cessive approximation analog-to-digital converter (SAR ADC), time-domain comparator, trilevel switching, ultralow power. I. I NTRODUCTION T HE RECENT rapid advancement in medical science and its application to actual patients’ life has urged the devel- opment of advanced electronic medical devices and has driven their power consumption to micropower level. Low-power medical devices including wearable devices with battery oper- ation usually consume power in the order of 100 μW to 1 mW, whereas the micropower medical devices including implantable medical devices with battery operation and wearable devices with batteryless operation consume power in the order of 1 to 10 μW [1]. For micropower medical devices, it is necessary to have data converters operate with a power consumption less than 1 μW while providing a moderate performance adequate for applications (e.g., sub-100-kS/s conversion rate and sub- 10-bit resolution typically), which will prolong the lifetime Manuscript received November 16, 2010; revised February 21, 2011; accepted April 10, 2011. Date of publication June 27, 2011; date of current version July 20, 2011. This work was supported by Agency for Science, Technology and Research, Science and Engineering Research Council (A*STAR SERC) Grant Program under Grant 0921480069. This paper was recommended by Associate Editor P. Mak. J. H. Cheong, P. B. Khannur, K. T. Tiew, and M. Je are with the Institute of Microelectronics, Singapore 117685 (e-mail: cheongjh@ime.a-star.edu.sg). K. L. Chan was with the Institute of Microelectronics, Singapore 117685. He is now with the Institute for Infocomm Research, Singapore 138632 (e-mail: klchan@i2r.a-star.edu.sg). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TCSII.2011.2158255 of the implantable devices operating with batteries and enable batteryless devices that acquire energy from the environment using energy harvesting techniques. The successive approxi- mation analog-to-digital converter (SAR ADC) is a suitable solution for micropower medical devices due to its high energy efficiency. An energy-efficient 8-bit SAR ADC was reported in [2]. The ADC utilizes a single-ended structure with only one boot- strapped switch to save power. It consumes 2.47 μW at a 200-kS/s conversion rate. Elzakker et al. developed a SAR ADC with a 65-nm process that charges the capacitor array in multiple steps [3]. The ADC achieves 10-bit resolution at a 1-MS/s conversion rate with a figure of merit (FOM) of only 4.4 fJ/conversion step while consuming 1.9 μW. Lee et al. presented a SAR ADC that utilizes a time-domain comparator to achieve low power consumption [4]. The ADC achieves an 8.7-bit effective number of bits (ENOB) at a 100-kS/s conversion rate while consuming 1.3-μW power. Several SAR ADC designs have successfully reduced the ADC power to the microwatt level. However, there is a need to reduce the power further down to the submicrowatt level, which is essential for micropower medical devices. Chen et al. described a trilevel switching scheme that reduces the power consumption by precharging the capacitors with a third voltage level before decision making [5]. There are two ways to precharge the capacitor arrays. One is by generating a third voltage level, and it would necessitate a high-power low- impedance buffer. The other way is by balancing the charge between the two differential capacitor arrays. The third voltage level generated in this way is subject to variation under long- term operation when the charge from the previous conversion is not completely discharged. Any inaccuracies in the third voltage level can cause a level mismatch and an offset of the SAR ADC. In this brief, a SAR ADC that utilizes a common-mode re- setting trilevel switching scheme with redundant algorithm and a time-domain comparator is presented. The common-mode re- setting trilevel switching scheme reduces the switching activity, as well as the power consumed by each switching operation. A generalized redundant algorithm is applied to accommodate the conversion error and relax the settling requirement for the time- domain comparator. Nonbinary SAR ADCs introduce redun- dancy so that errors in the first few steps of the SAR algorithm can be corrected at the later steps. Thus, with the nonbinary redundant algorithm, the effect of the offset caused by the level mismatch in trilevel switching scheme can be mitigated, and the power consumption can be further reduced by allowing a slower 1549-7747/$26.00 © 2011 IEEE