Carbon Nanotube Field Effect Transistors using Printed Semiconducting Tubes N. Rouhi * , D. Jain * , K. Zand * and P. J. Burke * * Department of Electrical Engineering & Computer Science, University of California-Irvine, California, USA, pburke@uci.edu ABSTRACT Purified, all-semiconducting nanotubes offer great promise for a variety of applications in RF and microwave electronics. It has been showed theoretically that carbon nanotube electronic devices have the potential of going into THz regime since 2004 [1]. In this work, we present device performance of thin-film transistors fabricated using a carbon nanotube spin-coating method that is economical and lends itself to mass manufacturing of nanotube electronics. Keywords: carbon nanotube, high mobility, printed electronics 1 INTRODUCTION Carbon nanotube devices have been speculated as having potentially THz cutoff frequencies since 2004 [1]. Since then, there have been many efforts to make this dream come true. However, only recently have the device cutoff frequencies crossed into the GHz range, as reviewed in [2]. To date, no RF devices with all-semiconducting nanotubes have been demonstrated. Both theoretical and experimental results show that having purified semiconducting tubes, as the channel of the transistor, will properly lead to desired Radio Frequency results. Study on different methods, such as dielectrophoresis, to deposit nanotubes, rather than in-place growth, have been a major focus of nanoelectronics recently [2]. Recent works also demonstrated a method of depositing self-sorted nanotube networks which can be used in fabrication of nanotube transistors [2]. In this work, we present progress towards RF devices using all semiconducting nanotubes as the starting material. A spin-on process, which is compatible with standard semiconductor processing, is presented. The device performance is measured in an RF compatible electrode geometry. In addition, the DC measurements demonstrate high mobility (more than 30 cm 2 /V-s) and good on/off ratio (in the range of more than 10 3 and 10 4 in some cases) achievements. 2 DEVICE FABRICATION Devices reported here were fabricated using a solution enriched up to 90% in semiconducting single walled carbon nanotubes (Isonanotubes-S, semiconducting purity 90+, diameter range – 1.2-1.7 nm, length range 300 nm to 5 micron). These solutions were made using density gradient centrifugation process for the separation of nanotubes with different chiralities (n,m indexes) [3]. In the process, nanotubes were first dispersed in deionized water using ionic surfactants and then iodixanol, a non-ionic, water- soluble iodine derivative was added to the solution to be used as a density gradient medium prior to the separation based on centrifugation. For our experiments, we used nanotube’s solutions as they were received without any further processing. Prior to the deposition of nanotubes, Si/SiO2 wafers were first modified with APTES (Figure 1). An amine terminated self-assembled monolayer was formed after this modification to assist with the solution based deposition process. For this modification wafers with thin oxide layers were first treated with hot piranha solution for 1 hour and then washed thoroughly with DI water. Piranha treatment introduces –OH groups on the oxide surface. For forming a thin monolayer, piranha treated wafers were dipped into 1% APTES solution (v/v) in isopropanol. After an hour wafers were washed several times with isopropanol to remove excess APTES from the wafer surface and then they were dried by blowing air. Nanotube solution was then either spin-coated or a 20 μL nanotube solution was poured onto per sq cm of wafer. After letting it dry for an hour, wafers were washed with plenty of deionized water and then air dried prior to observing them on SEM (Figure 2). Figure 1: APTES treatment protocol. Following the nanotube deposition, we patterned the wafer to deposit source and drain electrodes. The minimum NSTI-Nanotech 2010, www.nsti.org, ISBN 978-1-4398-3401-5 Vol. 1, 2010 180