International Research Journal of Engineering and Technology (IRJET) e-ISSN: 2395-0056 Volume: 08 Issue: 08 | Aug 2021 www.irjet.net p-ISSN: 2395-0072 © 2021, IRJET | Impact Factor value: 7.529 | ISO 9001:2008 Certified Journal | Page 3618 High-Density with Low-Power TCAM Design and Application Nirmala Sainee 1 , Rahul Nigam 2 , Sanjay Chouhan 3 1 Student, M.Tech., JIT Borawan 2 Assistant Professor, JIT Borawan 3 Associate Professor, JIT Borawan ---------------------------------------------------------------------***---------------------------------------------------------------------- Abstract— This work proposes circuit simulation-based methods for lessening TCAM power utilization and increase density of memory. Here in this design, we simulated conventional 16T-TCAM designed in 45nm technology. This traditional basic cell design is improved to 14T-TCAM design. In this 14T-TCAM design we reduce one access transistor from each SRAM cell part of TCAM. This results in reduction of 10 percent memory layout area. Although, this design increase READ time, which is less important in this type of memory compared to reduction in layout area. Beside this we also used OR-type cascade match-line compared to pre-charge high scheme. In this match-line scheme memory divide in four equal number of stages. During search if mismatch detected in any stage, SEARCH stop for the remaining stages and show a mismatch word. In fact, in a memory most of word mismatch, so it provides much improvement in power utilization over conventional design. This match-line design provide improvement in power consumption compared with conventional design. In this manner 14T-TCAM cell provide power consumption improvement of 80 percent with layout area reduction. This memory design suitable in present day communication network for sending data packets over network. Index Terms—CAM, High-Density, Low-Power, OR-type match-line INTRODUCTION As artificial intelligence (AI) approaches human-mind levels of speed and exactness, systems progressively depend on concentrated servers interfacing applications from the edge to the cloud. The blast in the quantity of gadgets associated with the Internet joined with a dramatic expansion in Internet traffic implies that the present systems have numerous situations where quick searches are required. Switches, a vital part of systems administration hardware, need to get and afterward settle on where to send a bundle of information to perform Internet Protocol (IP) sending or IP routing. The present switches require quick queries among a lot of information to empower quick information bundle routing. Different applications requiring fast pursuits incorporate translation lookaside buffers (TLB) and completely associative store controllers in CPUs, information base engines, and neural networks. While designers can pick among numerous choices to execute these searches, the best strategy includes utilizing content addressable memories (CAMs). CAMs think about search information against a table of put away information and return the location of the matching with information [1]. A CAM search works a lot quicker than its counterpart in programming, and consequently CAMs are supplanting programming in search concentrated applications, for example, address query in Internet switches, information compression, and database speed increase [2]. As the extents of the TCAM macros and the quantity of macros on a chip increment, chip creators ought to think about excess to improve yield. ECC additionally should be considered for higher unwavering quality applications. Literature Survey CAM (content-addressable memory) is a specific sort of fast memory that inquiries its whole substance in a solitary clock cycle [6]. A CAM cell in the chip comprises of two SRAM cells. SRAM requires broad silicon entryways to execute that require a great deal of power per search for quick searching. In a chip, power utilization creates warmth and prompts limits on warm dispersal by the restricted impression of a chip. This is a vital factor on the actual restriction on TCAM size today. CAMs can be utilized in a wide assortment of uses requiring high hunt speeds. These applications incorporate parametric bend extraction [7], frequency domain change [8], coding/translating data [9-10], Data compress [11-12], and picture coding [13-14]. The essential business utilization of CAMs today is to group and advance Internet convention (IP) bundles in network switches [15-16]. K. E. Grosspietsch initially portrayed the functioning engineering of a CAM and its execution. In this paper acquainted processor frameworks are presented and furthermore shown applications in artificial intelligence [6]. Arsovski et al. planned TCAM cell utilizes 4T static storage for expanded compactness of layout. This plan match-line (ML) sense conspire diminishes power utilization by limiting exchanging movement of search-lines and restricting voltage swing of MLs however working rate additionally decreased [17]. K. Pagiamtzis and A. Sheikholeslami likewise work to diminish force of TCAM by pipeline the search activity by breaking the match-lines into a few portions. They likewise decrease swing of search information on less capacitive worldwide pursuit lines and subsequently saving force [18]. I. Carlson et al. portrayed a novel installed high-density 5- semiconductor device (5T) single bit line SRAM cell [19].