285 Bisection trees and half-quad trees: Memory and time efficient data structures for VLSI layout editors * A. Pitaksanonkul, S. Thanawastien and C. Lursinsap The Center for Advanced Computer Studies, University of Southwestern Louisiana, Lafayette, LA 70504-4330, U.S.A. Received 15 October 1988 Abstract. In this paper, we present two new tree structures, bisection trees and half-quad trees that can be used as data structures for storing VLSI layouts. The bisection tree is based on the structure of a 2-d tree and the half-quad tree is constructed based on the bisection tree and the quad tree. These two trees perform as good as a 4-d tree in terms of speed but require less memory. Specifically, our experimental results show that, for region queries, the bisection tree has approximately the same nodes visited as the 4-d tree. In addition, the bisection tree requires less memory space and simpler procedures. For the half-quad tree, it is shown that it approximately 50% memory of that used by the 4-d tree which is approximately the same as the memory used by the quad tree. In addition, the half-quad tree achieves a much better speed than the quad tree. Keywords. Layout, database 1. Introduction One of the problems of designing an interactive layout editor in VLSI design systems is to find an efficient data structure to represent a VLSI layout. A suitable data structure would save space and running time in various geometrical operations, such as, reporting all rectangles intersecting a particular area. This operation is important in the context of implementing the design rule checking, * This work was partially supported by a grant from the Board of Regents, State of Louisiana, LEQ SF (1987-89)-RD-A-29. Elsevier Science Publishers B.V. INTEGRATION, the VLSI journal 8 (1989) 285-300 0167-9260/89/$3.50 © 1989, Elsevier Science Publishers B.V.