IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 45, NO. 9, SEPTEMBER 2010 1923 An Integrated ISFETs Instrumentation System in Standard CMOS Technology Wai Pan Chan, Bhusana Premanode, and Christofer Toumazou, Fellow, IEEE Abstract—This paper describes an integrated ISFETs instru- mentation system in a 0.18 m 1-poly-6-metal CMOS process. The chip is able to compute the average of CMOS ISFETs’ threshold voltages by using an averaging array employing global negative current feedback. In addition, neither reference voltage nor current is required to set up the sigma-delta modulator because the internal signal is converted and processed in the frequency domain. The chip operates at 3.3 V for the analog blocks and the digital input/output blocks, and at 1.8 V for the core digital logic. It achieves 8 bits accuracy under 80 W static power consumption. The die area is 2.6 mm . Index Terms—Averaging, CMOS ISFET, current feedback, cur- rent feedback opamp, frequency modulator, ISFET, ISFETs array, log domain, sigma-delta modulator, VCO. I. INTRODUCTION I ON-SENSITIVE field effect transistors (ISFETs), which were invented by Bergveld [1], are solid-state hydrogen ion (pH) sensors in silicon technology. An ISFET is similar to a field effect transistor (FET) which has a gate, source, drain, and bulk terminals. In contrast to the FET, however, an ISFET’s gate comprises an exterior ion-sensitive membrane together with a reference electrode, usually as a silver/silver chloride electrode system. By modifying the chemical composition of the mem- brane, different chemical sensors such as glucose sensors or DNA sensors [2], [3] are mass producible in commercial CMOS processes at low cost. In the past 10 years, research has focused on integrating ISFETs into a CMOS substrate for experimental [4], portable [1], and implantable [5] applications. One of the drawbacks in these applications is the removal of the polysil- icon layer in order to leave the gate oxide of the ISFET in di- rect contact with the chemical solution. This modification is not compatible with standard CMOS fabrication processes. Recently, research has explored another direction in what is known as floating-electrode CMOS ISFETs [6], [7]. The CMOS ISFETs are formed by joining a transistor’s polysilicon gate with all the metal layers and vias all together. The chip passi- vation layer, which is a layer of silicon nitride on top of silicon dioxide, becomes the ion-sensitive membrane. Since silicon ni- tride is amphoteric [1], [6], it can donate or accept positive hy- Manuscript received September 30, 2009; revised May 24, 2010; accepted May 31, 2010. Date of current version August 25, 2010. This paper was ap- proved by Associate Editor Ken Shepard. W. P. Chan is with the Department of Electrical and Electronic Engineering, Imperial College London, London SW7 2AZ, U.K. (e-mail: wai.p.chan@impe- rial.ac.uk). B. Premanode and C. Touamzou are with the Institute of Biomedical Engi- neering, Imperial College London, London SW7 2AZ, U.K. Digital Object Identifier 10.1109/JSSC.2010.2053863 drogen ions. When a silicon nitride is hydrolyzed and charged in an electrolyte, there are equal but opposite charged ions ac- cumulated in the electrolyte just above the surface of the sil- icon nitride, and those ions are arranged by the electrochemical double layer capacitor [1]. In Nernstian responses, the voltage developed in the double layer capacitor can reach 59 mV in re- sponse to a unit change in pH at room temperature [1]. Silicon nitride has shown a sub-Nernstian sensitivity of 45–56 mV/pH [8]. By setting up a reference electrode’s voltage to define the electrolyte potential, the electrical potential across the double layer capacitor can change the drain current of the ISFET. Thus, there exists a possibility of making chemical sensors in stan- dard CMOS technology, but the potential creates an issue: vari- ations of threshold voltages [6], [7]. Variation occurs as there are undefined trapped charges in the passivation layers, floating metals, and intra-layers dielectric where these charges all con- tribute to the computation of the threshold voltages. The situa- tion is similar to the trapped charges found in the gate oxide of MOSFETs. In an extreme case, Hammond et al. reported that their p-typed ISFETs had threshold voltages of 5 V [9]. This is a big problem in biasing the ISFETs under a 3.3 V power supply. There are few other problems in using this solid-state pH sensor in practice. For instance, ISFETs exhibit short term and long term drifts [10]. Thus, it needs a dedicated algorithm to counteract the drifts. ISFETs also show hysteresis, and recali- bration is required for each new experiment. Nevertheless, the possibility of implementing specific functions on a CMOS chip to compensate those ISFETs’ performance can produce accu- rate and precise pH measurements in micro- or nano-scale. The aim of this work is to illustrate a microwatt power in- strumentation circuit with CMOS ISFETs for handheld instru- ments. The need for a low power application is very important so as to save batteries’ life and to minimize any heat genera- tion due to the electrical power dissipation. Constant temper- ature minimizes the change in the sensitivity to pH, as ISFETs are sensitive to temperature. Besides, the instrumentation circuit should be able to cope with the uncertainties of the threshold voltages while achieving a satisfactory signal-to-noise ratio for its output. Section II presents the strategy used in the instrumen- tation. Section III describes the CMOS ISFETs in 1-POLY-6- METAL (1P6M) CMOS process and its array implementation. Section IV discusses how the ISFETs array can be adapted into current feedback opamp topology to yield an averaging ampli- fier. Section V analyzes the microwatt power log domain voltage controlled oscillator which controls the ultimate linearity to the system. Section VI shows the chip measurement results, and Section VII draws a conclusion. 0018-9200/$26.00 © 2010 IEEE