Gate Oxide Cleans On Single Wafer Cleaning Tool P.Garnier a , T.Vessa b , A.S.Larrea b , B.Pernet a , Y.Gomez a , D.Barge a , A.Torres c , B.Tavel a , C.Henderson a , D.Levy a a ST Microelectronics – Crolles2 Alliance, 860 rue Jean Monnet, 38926 Crolles, France b Freescale – Crolles2 Alliance, 860 rue Jean Monnet, 38926 Crolles, France c CEA – LETI, 17 avenue des Martyrs 38054 Grenoble cedex 9, France Pre gate oxide and especially “Double Gate Oxide” cleans are the most critical surface preparation steps in the semiconductor industry. This paper describes the key parameters to perform this kind of operations on a fully integrated single wafer cleaning tool. This switch from conventional batch cleaning tool enables significant defect density reduction and therefore yield enhancement. Nonetheless the main challenge of the double gate oxide clean is the prevention and the control of photo lithography resist lift off during the wet etch. This clean is also composed of two other steps, less critical. Nonetheless special care has been considered in the surface preparation in order to avoid any electrical mobility degradation. Introduction Over the last few years, the number of surface preparation steps in a typical CMOS flow increased drastically with the device complexity. It has been multiplied by five from 0.7μm to 45nm critical line width, representing 40% of a 45nm CMOS process flow. Indeed latest BEOL architecture require higher amount of metal layers and FEOL has higher amount of photo lithography masks for the introduction of system on chips where several options are embedded (DRAM, non volatile memory, analog, RF, …). Moreover, lithography requires cleaner and cleaner surfaces, which has made the scrubbing activity explode. Similar trend has been observed for the post ash cleans with greater need of masks. Only the pre-diffusion cleans amount remains almost unchanged. Recently single wafer cleaning tools are continuously replacing batch tools in the semiconductor industry (figure 1). The driving forces of this revolution are: process flexibility, cycle time, defects reduction and yield improvement. This trend started with BEOL cleans, followed by FEOL applications. Three steps haven’t yet become industry standard on single wafer tools: HF Last before epitaxy or metallization [1], silicide clean, and DGO (Dual gate oxide) cleans which is the topic of this paper. 0 10 20 30 40 Non contact scrubber post ash clean FEOL post ash clean BEOL Backside clean BEOL pre diff clean gate oxide cleans Metal strip Nitride etch Single wafer possible / industry standard Remains batch Topic