IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 61, NO. 10, OCTOBER 2013 3783 A CMOS 77-GHz Receiver Front-End for Automotive Radar Viet Hoang Le, Hoa Thai Duong, Anh Trong Huynh, Chien M. Ta, Fan Zhang, Member, IEEE, Robin J. Evans, and Efstratios Skafidas Abstract—This paper presents the design of a receiver (Rx) front-end for automotive radar application operating at 76–77 GHz. The Rx employs a double conversion architecture, which consists of a five-stage low-noise amplifier (LNA), a sub-har- monic mixer (SHM), and a double-balanced passive mixer (PSM). By adopting this architecture, millimeter-wave frequency syn- thesizer design can be relaxed. In the LNA layout, the output of each stage is positioned close to the input of the follow stage, thus creating a resonance load. As a result, complex interstage matching networks is simplified. The SHM driven by a 38-GHz local oscillator (LO) is adopted to avoid push/pull effect and power consumption of the voltage-controlled oscillator. A PSM is utilized for the second conversion since it consumes no dc current and has low flickering noise. To connect the singled-ended LNA and SHM, a 77-GHz balun is designed; and for driving the SHM, two 38-GHz baluns and an in-phase/quadrature coupler to provide quadrature 38-GHz LO are designed. The proposed Rx is implemented in a 65-nm CMOS technology and measurement results show 16-dB voltage gain and 13-dB calculated noise figure while dissipating 23.5 mA from a black 1.2-V supply. Index Terms—Balun, in-phase/quadrature (IQ) coupler, low-noise amplifier (LNA), passive mixer (PSM), receiver (Rx) front-end, 77-GHz CMOS radar, sub-harmonic mixer (SHM). I. INTRODUCTION T ODAY, automotive radar systems are widely installed in many transportation vehicles to assist driving safety and comfort. These systems provide drivers with information about distance between the vehicles and any other vehicles, as well as obstacles present on the road. The radar systems can take a further step into automatically controlling the accelerate/brake system of the vehicles to avoid any crashing accidents. The Manuscript received July 31, 2013; revised August 07, 2013; accepted Au- gust 12, 2013. Date of publication September 06, 2013; date of current ver- sion October 02, 2013. This work was supported by NICT Australia, funded by the Australian Government as represented by the Department of Broadband, Communications and the Digital Economy and the Australian Research Council through the ICT Centre of Excellence Program. V. H. Le, A. T. Huynh, and C. M. Ta are with National ICT Australia, Vic- toria Research Laboratory, Melbourne 3010, VIC, Australia (e-mail: hoangviet. le@nicta.com.au). H. T. Duong is with the Department of Electrical and Electronic Engineering, The University of Melbourne, Melbourne 3010, VIC, Australia. F. Zhang was with National ICT Australia, Victoria Research Laboratory, Melbourne 3010, VIC, Australia. He is now with Nitero, Melbourne 3000, VIC, Australia. R. J. Evans and E. Skafidas are with National ICT Australia, Victoria Re- search Laboratory, Melbourne 3010, VIC, Australia, and also with the Depart- ment of Electrical and Electronic Engineering, The University of Melbourne, Melbourne 3010, VIC, Australia. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TMTT.2013.2279368 transceiver for such automotive radar system operates in the fre- quency of a 76–77-GHz band [1]–[8]. There have been works developing the radar transceiver for this operating frequency [2]–[8], and many of them are realized in SiGe bipolar technology due to its robust well-modeled high- frequency operation in comparison with CMOS technology [2], [3], [6], [7]. However it is expensive and challenging to inte- grate SiGe bipolar analog components with digital parts imple- mented in CMOS. As a technology trend, there is a desire to pro- vide a cheap radar system for every single vehicle on the road; thus, suitable technology has been sought [4], [5], [8]. Over the last decades, CMOS technology has been getting attention due to its low cost, higher level of integrability, and technology scaling. However, in CMOS technology, the maximum unity current gain frequency is much lower than that of bipolar technology. Therefore, developing the transceiver working at 77 GHz in CMOS is very challenging [9]–[11]. With the moti- vation to develop a low-cost high-integration radar transceiver, this paper presents a design of a CMOS receiver (Rx) front-end operating in the 76–77-GHz band. In this work, a double-con- version architecture is selected to relax the design of the fre- quency synthesizer. Moreover, design details of each circuit block are deeply analyzed to achieve optimum performance. As a result, the proposed Rx front-end has a state-of-the-art per- formance while it consumes low power in comparison with the published literature. This paper is organized as follows. Section II discusses the architecture selection. Section III describes the circuit design detail. Section IV presents measurement results of the proposed Rx front-end. Section V concludes this study. II. Rx ARCHITECTURE AND SPECIFICATION A. Architecture In a conventional frequency modulated continuous wave (FMCW) radar system, a 77-GHz voltage-controlled oscillator (VCO) is controlled to generate a triangular shape with time modulated frequency at 77 GHz [1], [12]. In [4], the VCO is controlled by a phase-locked loop (PLL) whose reference signal is generated from a direct digital frequency synthesizer (DDFS). This approach allows using low-spec DDFS because the PLL can smooth the starlike voltage variation [4]. However, due to speed limitation of the PLL’s low-pass filter (LPF), the FMCW signal cannot be varied randomly. As a result, in a environment of many radar systems operating at the same time, the reflected signal cannot be distinguished with other forward transmitted 0018-9480 © 2013 IEEE